1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
|
/**
* @file
*
* AMD Family_10 specific feature leveling functions.
*
* Provides feature leveling functions specific to family 10h.
*
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: CPU/Family/0x10
* @e \$Revision: 6626 $ @e \$Date: 2008-07-04 02:01:02 +0800 (Fri, 04 Jul 2008) $
*
*/
/*
******************************************************************************
*
* Copyright (c) 2011, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#ifndef _CPU_F10_FEATURE_LEVELING_H_
#define _CPU_F10_FEATURE_LEVELING_H_
#include "cpuFamilyTranslation.h"
#include "cpuPostInit.h"
/*---------------------------------------------------------------------------------------
* M I X E D (Definitions And Macros / Typedefs, Structures, Enums)
*---------------------------------------------------------------------------------------
*/
/*---------------------------------------------------------------------------------------
* D E F I N I T I O N S A N D M A C R O S
*---------------------------------------------------------------------------------------
*/
/*---------------------------------------------------------------------------------------
* T Y P E D E F S, S T R U C T U R E S, E N U M S
*---------------------------------------------------------------------------------------
*/
/// F10 CPU Feature Low
typedef struct {
UINT32 FPU:1; ///< Bit0
UINT32 VME:1; ///< Bit1
UINT32 DE:1; ///< Bit2
UINT32 PSE:1; ///< Bit3
UINT32 TimeStampCounter:1; ///< Bit4
UINT32 MSR:1; ///< Bit5
UINT32 PAE:1; ///< Bit6
UINT32 MCE:1; ///< Bit7
UINT32 CMPXCHG8B:1; ///< Bit8
UINT32 APIC:1; ///< Bit9
UINT32 Reserved1:1; ///< Bit10
UINT32 SysEnterSysExit:1; ///< Bit11
UINT32 MTRR:1; ///< Bit12
UINT32 PGE:1; ///< Bit13
UINT32 MCA:1; ///< Bit14
UINT32 CMOV:1; ///< Bit15
UINT32 PAT:1; ///< Bit16
UINT32 PSE36:1; ///< Bit17
UINT32 Reserved2:1; ///< Bit18
UINT32 CLFSH:1; ///< Bit19
UINT32 Reserved3:3; ///< Bit20~22
UINT32 MMX:1; ///< Bit23
UINT32 FXSR:1; ///< Bit24
UINT32 SSE:1; ///< Bit25
UINT32 SSE2:1; ///< Bit26
UINT32 Reserved4:1; ///< Bit27
UINT32 HTT:1; ///< Bit28
UINT32 Reserved5:3; ///< Bit29~31
} CPU_F10_FEATURES_LO;
/// F10 CPU Feature High
typedef struct {
UINT32 SSE3:1; ///< Bit0
UINT32 Reserved1:2; ///< Bit1~2
UINT32 Monitor:1; ///< Bit3
UINT32 Reserved2:9; ///< Bit4~12
UINT32 CMPXCHG16B:1; ///< Bit13
UINT32 Reserved3:9; ///< Bit14~22
UINT32 POPCNT:1; ///< Bit23
UINT32 Reserved4:8; ///< Bit24~31
} CPU_F10_FEATURES_HI;
/// F10 CPU Feature
typedef struct {
CPU_F10_FEATURES_LO CpuF10FeaturesLo; ///< Low
CPU_F10_FEATURES_HI CpuF10FeaturesHi; ///< High
} CPU_F10_FEATURES;
/// F10 CPU Extended Feature Low
typedef struct {
UINT32 FPU:1; ///< Bit0
UINT32 VME:1; ///< Bit1
UINT32 DE:1; ///< Bit2
UINT32 PSE:1; ///< Bit3
UINT32 TimeStampCounter:1; ///< Bit4
UINT32 MSR:1; ///< Bit5
UINT32 PAE:1; ///< Bit6
UINT32 MCE:1; ///< Bit7
UINT32 CMPXCHG8B:1; ///< Bit8
UINT32 APIC:1; ///< Bit9
UINT32 Reserved1:1; ///< Bit10
UINT32 SysCallSysRet:1; ///< Bit11
UINT32 MTRR:1; ///< Bit12
UINT32 PGE:1; ///< Bit13
UINT32 MCA:1; ///< Bit14
UINT32 CMOV:1; ///< Bit15
UINT32 PAT:1; ///< Bit16
UINT32 PSE36:1; ///< Bit17
UINT32 Reserved2:2; ///< Bit18~19
UINT32 NX:1; ///< Bit20
UINT32 Reserved3:1; ///< Bit21
UINT32 MmxExt:1; ///< Bit22
UINT32 MMX:1; ///< Bit23
UINT32 FXSR:1; ///< Bit24
UINT32 FFXSR:1; ///< Bit25
UINT32 Page1GB:1; ///< Bit26
UINT32 RDTSCP:1; ///< Bit27
UINT32 Reserved4:1; ///< Bit28
UINT32 LM:1; ///< Bit29
UINT32 ThreeDNowExt:1; ///< Bit30
UINT32 ThreeDNow:1; ///< Bit31
} CPU_F10_EXT_FEATURES_LO;
/// F10 CPU Extended Feature High
typedef struct {
UINT32 LahfSahf:1; ///< Bit0
UINT32 CmpLegacy:1; ///< Bit1
UINT32 SVM:1; ///< Bit2
UINT32 ExtApicSpace:1; ///< Bit3
UINT32 AltMovCr8:1; ///< Bit4
UINT32 ABM:1; ///< Bit5
UINT32 SSE4A:1; ///< Bit6
UINT32 MisAlignSse:1; ///< Bit7
UINT32 ThreeDNowPrefetch:1; ///< Bit8
UINT32 OSVM:1; ///< Bit9
UINT32 IBS:1; ///< Bit10
UINT32 Reserved1:1; ///< Bit11
UINT32 SKINIT:1; ///< Bit12
UINT32 WDT:1; ///< Bit13
UINT32 Reserved2:5; ///< Bit14~18
UINT32 NodeId:1; ///< Bit19
UINT32 Reserved3:12; ///< Bit20~31
} CPU_F10_EXT_FEATURES_HI;
/// F10 CPU Extended Feature
typedef struct {
CPU_F10_EXT_FEATURES_LO CpuF10ExtFeaturesLo; ///< Low
CPU_F10_EXT_FEATURES_HI CpuF10ExtFeaturesHi; ///< High
} CPU_F10_EXT_FEATURES;
/*---------------------------------------------------------------------------------------
* F U N C T I O N P R O T O T Y P E
*---------------------------------------------------------------------------------------
*/
VOID
F10SaveFeatures (
IN CPU_SPECIFIC_SERVICES *FamilySpecificServices,
IN OUT CPU_FEATURES_LIST *cpuFeatureList,
IN AMD_CONFIG_PARAMS *StdHeader
);
VOID
F10WriteFeatures (
IN CPU_SPECIFIC_SERVICES *FamilySpecificServices,
IN OUT CPU_FEATURES_LIST *cpuFeatureList,
IN AMD_CONFIG_PARAMS *StdHeader
);
#endif // _CPU_F10_FEATURE_LEVELING_H_
|