1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
#include <stdlib.h>
#include "chip.h"
#include "f81865f.h"
static void pnp_enter_conf_state(device_t dev)
{
outb(0x87, dev->path.pnp.port);
outb(0x87, dev->path.pnp.port);
}
static void pnp_exit_conf_state(device_t dev)
{
outb(0xaa, dev->path.pnp.port);
}
static void f81865f_init(device_t dev)
{
struct superio_fintek_f81865f_config *conf = dev->chip_info;
if (!dev->enabled)
return;
switch (dev->path.pnp.device) {
/* TODO: Might potentially need code for HWM or FDC etc. */
case F81865F_KBC:
pc_keyboard_init(&conf->keyboard);
break;
}
}
static void f81865f_pnp_set_resources(device_t dev)
{
pnp_set_resources(dev);
}
static void f81865f_pnp_enable_resources(device_t dev)
{
pnp_enable_resources(dev);
}
static void f81865f_pnp_enable(device_t dev)
{
pnp_alt_enable(dev);
}
static const struct pnp_mode_ops pnp_conf_mode_ops = {
.enter_conf_mode = pnp_enter_conf_state,
.exit_conf_mode = pnp_exit_conf_state,
};
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = f81865f_pnp_set_resources,
.enable_resources = f81865f_pnp_enable_resources,
.enable = f81865f_pnp_enable,
.init = f81865f_init,
.ops_pnp_mode = &pnp_conf_mode_ops,
};
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x7f8 etc. values may not be correct. */
{ &ops, F81865F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, F81865F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, F81865F_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, F81865F_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, { 0x07ff, 0}, },
{ &ops, F81865F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, F81865F_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
{ &ops, F81865F_GPIO, PNP_IRQ0, },
{ &ops, F81865F_PME, },
};
static void enable_dev(device_t dev)
{
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_fintek_f81865f_ops = {
CHIP_NAME("Fintek F81865F Super I/O")
.enable_dev = enable_dev
};
|
