blob: d838f3aec19bf78f20b38d9c8748b282cae268dd (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
* Copyright (C) 2017 Nicola Corna <nicola@corna.info>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef SUPERIO_FINTEK_F71808A_CHIP_H
#define SUPERIO_FINTEK_F71808A_CHIP_H
#include <stdint.h>
struct superio_fintek_f71808a_config {
uint8_t hwm_vt1_boundary_1_temperature;
uint8_t hwm_vt1_boundary_2_temperature;
uint8_t hwm_vt1_boundary_3_temperature;
uint8_t hwm_vt1_boundary_4_temperature;
uint8_t hwm_fan1_boundary_hysteresis;
uint8_t hwm_domain1_en;
/* Multi function registers */
uint8_t multi_function_register_0;
uint8_t multi_function_register_1;
uint8_t multi_function_register_2;
uint8_t multi_function_register_3;
uint8_t multi_function_register_4;
/* Intel Ibex Peak/PECI/AMD TSI */
uint8_t hwm_peci_tsi_ctrl;
uint8_t hwm_tcc_temp;
/* Fan 1 control */
uint8_t hwm_fan1_seg1_speed;
uint8_t hwm_fan1_seg2_speed;
uint8_t hwm_fan1_seg3_speed;
uint8_t hwm_fan1_seg4_speed;
uint8_t hwm_fan1_seg5_speed;
uint8_t hwm_fan1_temp_src;
/* Fan 2 control */
uint8_t hwm_fan2_seg1_speed;
uint8_t hwm_fan2_seg2_speed;
uint8_t hwm_fan2_seg3_speed;
uint8_t hwm_fan2_seg4_speed;
uint8_t hwm_fan2_seg5_speed;
uint8_t hwm_fan2_temp_src;
};
#endif /* SUPERIO_FINTEK_F71808A_CHIP_H */
|
