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##
## This file is part of the coreboot project.
##
## Copyright (C) 2009 Ronald G. Minnich
## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
## Copyright (C) 2018 Eltan B.V.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
# Generic Aspeed preram driver - Just enough UART initialisation code for
# preram phase.
config SUPERIO_ASPEED_COMMON_PRE_RAM
bool
default n
config SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND
bool
default n
config SUPERIO_ASPEED_USE_UART_DELAY_WORKAROUND
bool "Workaround for BMC serial console setup bug"
depends on CONSOLE_SERIAL && SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND
default y
help
Some mainboards with an ASPEED BMC have scrambled console output in early boot phases
because the serial output routing is not set up fast enough by the BMC. By enabling
this a delay of 500ms gets added before setting up the console and before any console
output gets printed.
Note: this problem may disappear with future BMC firmware versions. Another approach
is using a different BMC firmware like OpenBMC, u-bmc, ...
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