aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/via/vt8237r/vt8237r_usb.c
blob: 2c554ca3da5e7b7915add63d165e62ae9d9c4de0 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
/*
 * This file is part of the coreboot project.
 *
 * Copyright (C) 2007, 2008 Rudolf Marek <r.marek@assembler.cz>
 * Copyright (C) 2009 Jon Harrison <bothlyn@blueyonder.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 */

#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include "vt8237r.h"

#if CONFIG_EPIA_VT8237R_INIT
u32 usb_io_addr[4] = {0xcc00, 0xd000, 0xd400, 0xd800};
#endif

static void usb_i_init(struct device *dev)
{

#if CONFIG_EPIA_VT8237R_INIT
	u8 reg8;

	printk_debug("Entering %s\n", __func__);

	printk_spew("%s Read %02X from PCI Command Reg\n", dev_path(dev), reg8);

	reg8 = pci_read_config8(dev, 0x04);

	reg8 = reg8 | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
	pci_write_config8(dev, 0x04, reg8);

	printk_spew("%s Wrote %02X to PCI Command Reg\n", dev_path(dev), reg8);

	/* Set Cache Line Size and Latency Timer */
	pci_write_config8(dev, 0x0c, 0x08);
	pci_write_config8(dev, 0x0d, 0x20);

	/* Enable Sub Device ID Back Door and set Generic */
	reg8 = pci_read_config8(dev, 0x42);
	reg8 |= 0x10;
	pci_write_config8(dev, 0x42, reg8);
	pci_write_config16(dev, 0x2e, 0xAA07);
	reg8 &= ~0x10;
	pci_write_config8(dev, 0x42, reg8);


	pci_write_config8(dev, 0x41, 0x12);

	pci_write_config8(dev, 0x49, 0x0B);

	/* Clear PCI Status */
	pci_write_config16(dev, 0x06, 0x7A10);
#endif
	return;
}

static void vt8237_usb_i_read_resources(struct device *dev)
{
#if CONFIG_EPIA_VT8237R_INIT
	struct resource *res;
	u8 function = (u8) dev->path.pci.devfn & 0x7;

	printk_spew("VT8237R Fixing USB 1.1 fn %d I/O resource = 0x%04X\n", function, usb_io_addr[function]);

	/* Fix the I/O Resources of the USB1.1 Interfaces */
	/* Auto PCI probe seems to size the resources     */
	/* Incorrectly                                    */
	res = new_resource(dev, PCI_BASE_ADDRESS_4);
	res->base = usb_io_addr[function];
	res->size = 256;
	res->limit = 0xffffUL;
	res->align = 10;
	res->gran = 8;
	res->flags = IORESOURCE_IO | IORESOURCE_FIXED |
		     		IORESOURCE_ASSIGNED;
#else
	pci_dev_read_resources(dev);
#endif
	return;
}

static void usb_ii_init(struct device *dev)
{
#if CONFIG_EPIA_VT8237R_INIT
	u8 reg8;

	printk_debug("Entering %s\n", __func__);

	/* Set memory Write and Invalidate */
	reg8 = pci_read_config8(dev, 0x04);
	reg8 |= 0x10;
	pci_write_config8(dev, 0x04, reg8);

	/* Set Cache line Size and Latency Timer */
	pci_write_config8(dev, 0x0c, 0x08);
	pci_write_config8(dev, 0x0d, 0x20);

	/* Clear PCI Status */
	pci_write_config16(dev, 0x06, 0x7A10);
#endif

}

static void vt8237_usb_ii_read_resources(struct device *dev)
{
#if CONFIG_EPIA_VT8237R_INIT
	struct resource *res;

	/* Fix the I/O Resources of the USB2.0 Interface */
	res = new_resource(dev, PCI_BASE_ADDRESS_0);
	res->base = 0xF6000000ULL;
	res->size = 256;
	res->align = 12;
	res->gran = 8;
	res->limit = res->base + res->size - 1;
	res->flags = IORESOURCE_MEM | IORESOURCE_FIXED |
		     		IORESOURCE_ASSIGNED;
#else
	pci_dev_read_resources(dev);
#endif
	return;
}

static const struct device_operations usb_i_ops = {
	.read_resources		= vt8237_usb_i_read_resources,
	.set_resources		= pci_dev_set_resources,
	.enable_resources	= pci_dev_enable_resources,
	.init				= usb_i_init,
	.enable				= 0,
	.ops_pci			= 0,
};

static const struct device_operations usb_ii_ops = {
	.read_resources		= vt8237_usb_ii_read_resources,
	.set_resources		= pci_dev_set_resources,
	.enable_resources	= pci_dev_enable_resources,
	.init				= usb_ii_init,
	.enable				= 0,
	.ops_pci			= 0,
};

static const struct pci_driver vt8237r_driver_usbii __pci_driver = {
	.ops	= &usb_ii_ops,
	.vendor	= PCI_VENDOR_ID_VIA,
	.device	= PCI_DEVICE_ID_VIA_VT8237R_EHCI,
};

static const struct pci_driver vt8237r_driver_usbi __pci_driver = {
	.ops	= &usb_i_ops,
	.vendor	= PCI_VENDOR_ID_VIA,
	.device	= PCI_DEVICE_ID_VIA_VT8237R_UHCI,
};