blob: 126a8cf40dfc510cb7db06d427c3ea0cc6b0b855 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
|
/*
* This file is part of the coreboot project.
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <device/cardbus.h>
#include "pci7420.h"
#include "chip.h"
static void pci7420_firewire_init(struct device *dev)
{
printk(BIOS_DEBUG, "TI PCI7420/7620 FireWire init\n");
#ifdef ODD_IRQ_FIXUP
/* This is a workaround for buggy kernels. This should
* probably be read from the device tree, but as long
* as only one mainboard is using this bridge it does
* not matter
*/
pci_write_config8(dev, PCI_INTERRUPT_PIN, INTC);
#endif
}
static struct device_operations ti_pci7420_firewire_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = pci7420_firewire_init,
};
static const struct pci_driver ti_pci7420_driver __pci_driver = {
.ops = &ti_pci7420_firewire_ops,
.vendor = 0x104c,
.device = 0x802e,
};
|
