src/southbridge/intel/i82801gx/bootblock.c


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21

/* SPDX-License-Identifier: GPL-2.0-only */

#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include <southbridge/intel/common/early_spi.h>
#include "i82801gx.h"

void bootblock_early_southbridge_init(void)
{
	enable_spi_prefetching_and_caching();

	i82801gx_setup_bars();

	/* Enable upper 128bytes of CMOS */
	RCBA32(0x3400) = (1 << 2);

	/* Disable watchdog timer */
	RCBA32(GCS) = RCBA32(GCS) | 0x20;

	i82801gx_lpc_setup();
}