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# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config SOC_ROCKCHIP_RK3288
bool
default n
select ARCH_BOOTBLOCK_ARMV7
select ARCH_VERSTAGE_ARMV7
select ARCH_ROMSTAGE_ARMV7
select ARCH_RAMSTAGE_ARMV7
select DRIVERS_UART_8250MEM_32
select UNCOMPRESSED_RAMSTAGE
select GENERIC_GPIO_LIB
select RTC
select UART_OVERRIDE_REFCLK
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_FORCE_NATIVE_VGA_INIT
select HAVE_LINEAR_FRAMEBUFFER
select NO_BOOTBLOCK_CONSOLE
select NO_FMAP_CACHE
if SOC_ROCKCHIP_RK3288
config VBOOT
select VBOOT_MUST_REQUEST_DISPLAY
select VBOOT_STARTS_IN_BOOTBLOCK
select VBOOT_SEPARATE_VERSTAGE
select VBOOT_RETURN_FROM_VERSTAGE
config PMIC_BUS
int
default -1
endif
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