blob: 05f29e4be9a188c86df0e4a9e12d6075d3f5db3c (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
|
config SOC_QC_IPQ40XX
bool
default n
select ARCH_BOOTBLOCK_ARMV7
select ARCH_VERSTAGE_ARMV7
select ARCH_ROMSTAGE_ARMV7
select ARCH_RAMSTAGE_ARMV7
select BOOTBLOCK_CONSOLE
select HAVE_UART_SPECIAL
select GENERIC_GPIO_LIB
select HAVE_MONOTONIC_TIMER
if SOC_QC_IPQ40XX
config CHROMEOS
select RETURN_FROM_VERSTAGE
select SEPARATE_VERSTAGE
select VBOOT_VBNV_FLASH
config IPQ_QFN_PART
bool
default n
help
Is the SoC a QFN part (as opposed to a BGA part)
config MBN_ENCAPSULATION
depends on USE_BLOBS
bool "bootblock encapsulation for ipq40xx"
default y
config CDT_MBN
string "CDT binary blob"
default "cdt-AP.DK01.1-C1.bin"
config DDR_MBN
string "DDR driver binary blob"
default "ddr.mbn"
config TZ_MBN
string "TZ binary blob"
default "tzbsp_no_xpu.mbn"
config SBL_ELF
depends on USE_BLOBS
string "file name of the QCA SBL ELF"
default "3rdparty/blobs/cpu/qualcomm/ipq40xx/sbl.elf"
help
The path and filename of the binary blob containing
ipq40xx early initialization code, as supplied by the
vendor.
config SBL_UTIL_PATH
depends on USE_BLOBS
string "Path for utils to combine SBL_ELF and bootblock"
default "util/ipqheader"
help
Path for utils to combine SBL_ELF and bootblock
config HEAP_SIZE
hex
default 0x8000
endif
|
