1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
|
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __SOC_NVIDIA_TEGRA132_FUNIT_CFG_H
#define __SOC_NVIDIA_TEGRA132_FUNIT_CFG_H
#include <stdint.h>
#include <soc/nvidia/tegra132/pinmux.h>
#include <soc/padconfig.h>
#include <soc/clock.h>
#define FUNIT_INDEX(_name) FUNIT_##_name
enum {
FUNIT_INDEX(SBC1),
FUNIT_INDEX(SBC4),
FUNIT_INDEX(I2C2),
FUNIT_INDEX(I2C3),
FUNIT_INDEX(I2C5),
FUNIT_INDEX(I2C6),
FUNIT_INDEX(SDMMC3),
FUNIT_INDEX(SDMMC4),
FUNIT_INDEX(USBD),
FUNIT_INDEX(USB2),
FUNIT_INDEX(USB3),
FUNIT_INDEX_MAX,
};
/*
* Note: these bus numbers are dependent on the driver implementations, and
* currently the I2C is 0-based and SPI is 1-based in its indexing.
*/
enum {
I2C2_BUS = 1,
I2C3_BUS = 2,
I2C5_BUS = 4,
I2CPWR_BUS = I2C5_BUS,
I2C6_BUS = 5,
SPI1_BUS = 1,
SPI4_BUS = 4,
};
struct funit_cfg {
uint32_t funit_index;
uint32_t clk_src_id;
uint32_t clk_src_freq_id;
uint32_t clk_dev_freq_khz;
struct pad_config const* pad_cfg;
size_t pad_cfg_size;
};
#define FUNIT_CFG(_funit,_clk_src,_clk_freq,_cfg,_cfg_size) \
{ \
.funit_index = FUNIT_INDEX(_funit), \
.clk_src_id = CLK_SRC_DEV_ID(_funit, _clk_src), \
.clk_src_freq_id = CLK_SRC_FREQ_ID(_funit, _clk_src), \
.clk_dev_freq_khz = _clk_freq, \
.pad_cfg = _cfg, \
.pad_cfg_size = _cfg_size, \
}
#define FUNIT_CFG_USB(_funit) \
{ \
.funit_index = FUNIT_INDEX(_funit), \
.pad_cfg = NULL, \
.pad_cfg_size = 0, \
}
/*
* Configure the funits associated with entry according to the configuration.
*/
void soc_configure_funits(const struct funit_cfg * const entries, size_t num);
#endif /* __SOC_NVIDIA_TEGRA132_FUNIT_CFG_H */
|