1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
|
/* SPDX-License-Identifier: GPL-2.0-only */
#include <assert.h>
#include <console/console.h>
#include <device/mmio.h>
#include <soc/addressmap.h>
#include <soc/pmif.h>
#include <soc/pmif_spi.h>
#include <soc/pmif_spmi.h>
#include <soc/pmif_sw.h>
#include <soc/spmi.h>
#include <string.h>
#include <timer.h>
static int pmif_check_swinf(struct pmif *arb, long timeout_us, u32 expected_status)
{
u32 reg_rdata;
struct stopwatch sw;
stopwatch_init_usecs_expire(&sw, timeout_us);
do {
reg_rdata = read32(&arb->ch->ch_sta);
if (stopwatch_expired(&sw))
return E_TIMEOUT;
} while (GET_SWINF_0_FSM(reg_rdata) != expected_status);
return 0;
}
static void pmif_send_cmd(struct pmif *arb, int write, u32 opc, u32 slvid,
u32 addr, u32 *rdata, u32 wdata, u32 len)
{
int ret;
u32 data, bc = len - 1;
/* Wait for Software Interface FSM state to be IDLE. */
ret = pmif_check_swinf(arb, PMIF_WAIT_IDLE_US, SWINF_FSM_IDLE);
if (ret) {
printk(BIOS_ERR, "[%s] idle timeout\n", __func__);
return;
}
/* Set the write data */
if (write)
write32(&arb->ch->wdata, wdata);
/* Send the command. */
write32(&arb->ch->ch_send,
(opc << 30) | (write << 29) | (slvid << 24) | (bc << 16) | addr);
if (!write) {
/*
* Wait for Software Interface FSM state to be WFVLDCLR,
* read the data and clear the valid flag.
*/
ret = pmif_check_swinf(arb, PMIF_READ_US, SWINF_FSM_WFVLDCLR);
if (ret) {
printk(BIOS_ERR, "[%s] read timeout\n", __func__);
return;
}
data = read32(&arb->ch->rdata);
*rdata = data;
write32(&arb->ch->ch_rdy, 0x1);
}
}
static void pmif_spmi_read(struct pmif *arb, u32 slvid, u32 reg, u32 *data)
{
*data = 0;
pmif_send_cmd(arb, 0, PMIF_CMD_EXT_REG_LONG, slvid, reg, data, 0, 1);
}
static void pmif_spmi_write(struct pmif *arb, u32 slvid, u32 reg, u32 data)
{
pmif_send_cmd(arb, 1, PMIF_CMD_EXT_REG_LONG, slvid, reg, NULL, data, 1);
}
static u32 pmif_spmi_read_field(struct pmif *arb, u32 slvid, u32 reg, u32 mask, u32 shift)
{
u32 data;
pmif_spmi_read(arb, slvid, reg, &data);
data &= (mask << shift);
data >>= shift;
return data;
}
static void pmif_spmi_write_field(struct pmif *arb, u32 slvid, u32 reg,
u32 val, u32 mask, u32 shift)
{
u32 old, new;
pmif_spmi_read(arb, slvid, reg, &old);
new = old & ~(mask << shift);
new |= (val << shift);
pmif_spmi_write(arb, slvid, reg, new);
}
static void pmif_spi_read(struct pmif *arb, u32 slvid, u32 reg, u32 *data)
{
*data = 0;
pmif_send_cmd(arb, 0, PMIF_CMD_REG_0, slvid, reg, data, 0, 1);
}
static void pmif_spi_write(struct pmif *arb, u32 slvid, u32 reg, u32 data)
{
pmif_send_cmd(arb, 1, PMIF_CMD_REG_0, slvid, reg, NULL, data, 1);
}
static u32 pmif_spi_read_field(struct pmif *arb, u32 slvid, u32 reg, u32 mask, u32 shift)
{
u32 data;
pmif_spi_read(arb, slvid, reg, &data);
data &= (mask << shift);
data >>= shift;
return data;
}
static void pmif_spi_write_field(struct pmif *arb, u32 slvid, u32 reg,
u32 val, u32 mask, u32 shift)
{
u32 old, new;
pmif_spi_read(arb, slvid, reg, &old);
new = old & ~(mask << shift);
new |= (val << shift);
pmif_spi_write(arb, slvid, reg, new);
}
static int is_pmif_init_done(struct pmif *arb)
{
if (read32(&arb->mtk_pmif->init_done) & 0x1)
return 0;
return -E_NODEV;
}
static const struct pmif pmif_spmi_arb[] = {
{
.mtk_pmif = (struct mtk_pmif_regs *)PMIF_SPMI_BASE,
.ch = (struct chan_regs *)PMIF_SPMI_AP_CHAN,
.mstid = SPMI_MASTER_0,
.pmifid = PMIF_SPMI,
.write = pmif_spmi_write,
.read = pmif_spmi_read,
.write_field = pmif_spmi_write_field,
.read_field = pmif_spmi_read_field,
.is_pmif_init_done = is_pmif_init_done,
},
};
static const struct pmif pmif_spi_arb[] = {
{
.mtk_pmif = (struct mtk_pmif_regs *)PMIF_SPI_BASE,
.ch = (struct chan_regs *)PMIF_SPI_AP_CHAN,
.pmifid = PMIF_SPI,
.write = pmif_spi_write,
.read = pmif_spi_read,
.write_field = pmif_spi_write_field,
.read_field = pmif_spi_read_field,
.is_pmif_init_done = is_pmif_init_done,
},
};
struct pmif *get_pmif_controller(int inf, int mstid)
{
if (inf == PMIF_SPMI && mstid < ARRAY_SIZE(pmif_spmi_arb))
return (struct pmif *)&pmif_spmi_arb[mstid];
else if (inf == PMIF_SPI)
return (struct pmif *)&pmif_spi_arb[0];
die("[%s] Failed to get pmif controller: inf = %d, mstid = %d\n", __func__, inf, mstid);
return NULL;
}
int mtk_pmif_init(void)
{
int ret;
ret = pmif_clk_init();
if (!ret)
ret = pmif_spmi_init(get_pmif_controller(PMIF_SPMI, SPMI_MASTER_0));
if (!ret)
ret = pmif_spi_init(get_pmif_controller(PMIF_SPI, 0));
return ret;
}
|
