1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
|
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
#include <soc/mt6315.h>
/*
* These values are used by MediaTek internally.
* We can find these registers in "MT6315 datasheet v1.3.pdf".
* The setting values are provided by MeidaTek designers.
*/
static const struct mt6315_setting init_setting_cpu[] = {
/* remove protection */
{0x3A9, 0x63, 0xFF, 0},
{0x3A8, 0x15, 0xFF, 0},
{0x3A0, 0x9C, 0xFF, 0},
{0x39F, 0xEA, 0xFF, 0},
{0x993, 0x47, 0xFF, 0},
{0x992, 0x29, 0xFF, 0},
{0x1418, 0x55, 0xFF, 0},
{0x1417, 0x43, 0xFF, 0},
{0x3A2, 0x2A, 0xFF, 0},
{0x3A1, 0x7C, 0xFF, 0},
/* init settings for mt6315 */
{0x997, 0xF, 0x7F, 0},
{0x999, 0xF0, 0xF0, 0},
{0x9A0, 0x0, 0x1F, 0},
{0x9A1, 0x0, 0x1F, 0},
{0x9A2, 0x0, 0x1F, 0},
{0x9A3, 0x0, 0x1F, 0},
{0x1440, 0x0, 0xE, 0},
{0x1487, 0x58, 0xFF, 0},
{0x148B, 0x3, 0x7F, 0},
{0x148C, 0x3, 0x7F, 0},
{0x1507, 0x58, 0xFF, 0},
{0x150B, 0x3, 0x7F, 0},
{0x150C, 0x3, 0x7F, 0},
{0x1587, 0x58, 0xFF, 0},
{0x158B, 0x3, 0x7F, 0},
{0x158C, 0x3, 0x7F, 0},
{0x1607, 0x58, 0xFF, 0},
{0x160B, 0x3, 0x7F, 0},
{0x160C, 0x3, 0x7F, 0},
{0x1687, 0x22, 0x76, 0},
{0x1688, 0xF, 0x2F, 0},
{0x1689, 0xA1, 0xE1, 0},
{0x168A, 0x79, 0x7F, 0},
{0x168B, 0x12, 0x3F, 0},
{0x168D, 0xC, 0xC, 0},
{0x168E, 0xD7, 0xFF, 0},
{0x168F, 0x81, 0xFF, 0},
{0x1690, 0x3, 0x3F, 0},
{0x1691, 0x22, 0x76, 0},
{0x1692, 0xF, 0x2F, 0},
{0x1693, 0xA1, 0xE1, 0},
{0x1694, 0x79, 0x7F, 0},
{0x1695, 0x12, 0x3F, 0},
{0x1697, 0xC, 0xC, 0},
{0x1698, 0xD7, 0xFF, 0},
{0x1699, 0x81, 0xFF, 0},
{0x169A, 0x3, 0x3F, 0},
{0x169B, 0x22, 0x76, 0},
{0x169C, 0xF, 0x2F, 0},
{0x169D, 0xA1, 0xE1, 0},
{0x169E, 0x79, 0xFF, 0},
{0x169F, 0x12, 0x3F, 0},
{0x16A1, 0xC, 0xC, 0},
{0x16A2, 0xD7, 0xFF, 0},
{0x16A3, 0x81, 0xFF, 0},
{0x16A4, 0x3, 0x3F, 0},
{0x16A5, 0x22, 0x76, 0},
{0x16A6, 0xF, 0x2F, 0},
{0x16A7, 0xA1, 0xE1, 0},
{0x16A8, 0x79, 0xFF, 0},
{0x16A9, 0x12, 0x3F, 0},
{0x16AB, 0xC, 0xC, 0},
{0x16AC, 0xD7, 0xFF, 0},
{0x16AD, 0x81, 0xFF, 0},
{0x16AE, 0x3, 0x3F, 0},
{0x16CE, 0x0, 0x8, 0},
{0x13, 0x2, 0x2, 0},
{0x15, 0x1F, 0x1F, 0},
{0x22, 0x12, 0x12, 0},
{0x8A, 0x6, 0xF, 0},
{0x10B, 0x3, 0x3, 0},
{0x38B, 0x4, 0xFF, 0},
{0xA07, 0x0, 0x1, 0},
{0xA1A, 0x1F, 0x1F, 0},
{0x1457, 0x0, 0xFF, 0},
/* add protection */
{0x3A1, 0x0, 0xFF, 0},
{0x3A2, 0x0, 0xFF, 0},
{0x1417, 0x0, 0xFF, 0},
{0x1418, 0x0, 0xFF, 0},
{0x992, 0x0, 0xFF, 0},
{0x993, 0x0, 0xFF, 0},
{0x39F, 0x0, 0xFF, 0},
{0x3A0, 0x0, 0xFF, 0},
{0x3A8, 0x0, 0xFF, 0},
{0x3A9, 0x0, 0xFF, 0},
};
void mt6315_init_setting(void)
{
for (int i = 0; i < ARRAY_SIZE(init_setting_cpu); i++)
mt6315_write_field(MT6315_CPU,
init_setting_cpu[i].addr, init_setting_cpu[i].val,
init_setting_cpu[i].mask, init_setting_cpu[i].shift);
}
|