blob: 754c0da580dee275bb15fdd9daed81cd84993e45 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
|
config SOC_MEDIATEK_COMMON
bool
help
common code blocks for Mediatek SOCs
if SOC_MEDIATEK_COMMON
config MEDIATEK_DRAM_DVFS
bool
default n
help
This option enables DRAM calibration with multiple frequencies (low,
medium and high frequency groups, with total 7 frequencies) for DVFS
feature. All supported data rates are: 800, 1200, 1600, 1866, 2400,
3200, 4266.
config MEDIATEK_DRAM_DVFS_LIMIT_FREQ_CNT
bool
default y
depends on MEDIATEK_DRAM_DVFS
help
This options limit DRAM frequency calibration count from total 7 to 3,
other frequency will directly use the low frequency shu result.
config MEMORY_TEST
bool
default y
help
This option enables memory basic compare test to verify the DRAM read
or write is as expected.
config CLEAR_WDT_MODE_REG
bool
help
Enable this option to clear WTD mode register explicitly.
config DPM_FOUR_CHANNEL
bool
default n
help
This option enables four channel configuration for DPM.
config MTK_DFD
bool
default n
help
This option enables DFD (Design for Debug) settings.
endif
|