blob: 6ba6fdb72cfa478504e7d23a4af77c0149a9d825 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Inc.
* Copyright (C) 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _SOC_SMM_H_
#define _SOC_SMM_H_
#include <stdint.h>
#include <cpu/x86/msr.h>
#include <fsp/memmap.h>
#include <soc/gpio.h>
struct ied_header {
char signature[10];
u32 size;
u8 reserved[34];
} __attribute__ ((packed));
struct smm_relocation_params {
u32 smram_base;
u32 smram_size;
u32 ied_base;
u32 ied_size;
msr_t smrr_base;
msr_t smrr_mask;
msr_t emrr_base;
msr_t emrr_mask;
msr_t uncore_emrr_base;
msr_t uncore_emrr_mask;
/*
* The smm_save_state_in_msrs field indicates if SMM save state
* locations live in MSRs. This indicates to the CPUs how to adjust
* the SMMBASE and IEDBASE
*/
int smm_save_state_in_msrs;
};
/* Mainboard handler for GPI SMIs*/
void mainboard_smi_gpi_handler(const struct gpi_status *sts);
/* Mainboard handler for eSPI SMIs */
void mainboard_smi_espi_handler(void);
#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
uintptr_t staggered_smbase);
void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
size_t *smm_save_state_size);
void smm_initialize(void);
void smm_relocate(void);
/*
* The initialization of the southbridge is split into 2 compoments. One is
* for clearing the state in the SMM registers. The other is for enabling
* SMIs.
*/
void southbridge_smm_clear_state(void);
void southbridge_smm_enable_smi(void);
#else /* CONFIG_HAVE_SMI_HANDLER */
static inline void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
uintptr_t staggered_smbase) {}
static inline void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
size_t *smm_save_state_size) {}
static inline void smm_initialize(void) {}
static inline void smm_relocate(void) {}
static inline void southbridge_smm_clear_state(void) {}
static inline void southbridge_smm_enable_smi(void) {}
#endif /* CONFIG_HAVE_SMI_HANDLER */
#endif
|