index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
gitea
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
skylake
/
include
/
fsp11
/
soc
Mode
Name
Size
-rw-r--r--
ramstage.h
1069
log
plain
-rw-r--r--
romstage.h
859
log
plain
