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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Inc.
* Copyright (C) 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc.
*/
Device (GPIO)
{
Name (_HID, "INT344B")
Name (_UID, 1)
Name (_DDN, "GPIO Controller")
Name (RBUF, ResourceTemplate()
{
Memory32Fixed (ReadWrite, 0, 0, COM0)
Memory32Fixed (ReadWrite, 0, 0, COM1)
Memory32Fixed (ReadWrite, 0, 0, COM3)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
{ 0 }
})
Method (_CRS, 0, NotSerialized)
{
/* GPIO Community 0 */
CreateDWordField (^RBUF, ^COM0._BAS, BAS0)
CreateDWordField (^RBUF, ^COM0._LEN, LEN0)
Store (^^PCRB (PID_GPIOCOM0), BAS0)
Store (GPIO_BASE_SIZE, LEN0)
/* GPIO Community 1 */
CreateDWordField (^RBUF, ^COM1._BAS, BAS1)
CreateDWordField (^RBUF, ^COM1._LEN, LEN1)
Store (^^PCRB (PID_GPIOCOM1), BAS1)
Store (GPIO_BASE_SIZE, LEN1)
/* GPIO Community 3 */
CreateDWordField (^RBUF, ^COM3._BAS, BAS3)
CreateDWordField (^RBUF, ^COM3._LEN, LEN3)
Store (^^PCRB (PID_GPIOCOM3), BAS3)
Store (GPIO_BASE_SIZE, LEN3)
CreateDWordField (^RBUF, ^GIRQ._INT, IRQN)
And (^^PCRR (PID_GPIOCOM0, MISCCFG_OFFSET),
GPIO_DRIVER_IRQ_ROUTE_MASK, Local0)
If (LEqual (Local0, GPIO_DRIVER_IRQ_ROUTE_IRQ14)) {
Store (GPIO_IRQ14, IRQN)
} Else {
Store (GPIO_IRQ15, IRQN)
}
Return (RBUF)
}
Method (_STA, 0, NotSerialized)
{
Return (0xF)
}
}
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