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/*
* This file is part of the coreboot project.
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _SOC_JASPERLAKE_GPIO_H_
#define _SOC_JASPERLAKE_GPIO_H_
#include <soc/gpio_defs.h>
#include <intelblocks/gpio.h>
#define CROS_GPIO_NAME "INT34C8"
#define CROS_GPIO_COMM0_NAME "INT34C8:00"
#define CROS_GPIO_COMM1_NAME "INT34C8:01"
#define CROS_GPIO_COMM4_NAME "INT34C8:02"
#define CROS_GPIO_COMM5_NAME "INT34C8:03"
#endif
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