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config SOC_INTEL_COMMON
bool
select HAVE_DISPLAY_MTRRS
help
common code for Intel SOCs
if SOC_INTEL_COMMON
comment "Intel SoC Common Code"
source "src/soc/intel/common/block/Kconfig"
comment "Intel SoC Common PCH Code"
source "src/soc/intel/common/pch/Kconfig"
comment "Intel SoC Common coreboot stages"
source "src/soc/intel/common/basecode/Kconfig"
config DISPLAY_SMM_MEMORY_MAP
bool "SMM: Display the SMM memory map"
default n
config SOC_INTEL_COMMON_RESET
bool
default n
select HAVE_CF9_RESET
config SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
bool
default n
config ACPI_CONSOLE
bool
default n
help
Provide a mechanism for serial console based ACPI debug.
config MMA
bool "Enable MMA (Memory Margin Analysis) support for Intel Core"
default n
depends on SOC_INTEL_KABYLAKE || SOC_INTEL_SKYLAKE
help
Set this option to y to enable MMA (Memory Margin Analysis) support
config MMA_BLOBS_PATH
string "Path to MMA blobs"
depends on MMA
default "3rdparty/blobs/soc/intel/kabylake/mma-blobs" if SOC_INTEL_KABYLAKE
default "3rdparty/blobs/soc/intel/skylake/mma-blobs" if SOC_INTEL_SKYLAKE
config SOC_INTEL_COMMON_ACPI
bool
default n
config SOC_INTEL_COMMON_NHLT
bool
default n
config TPM_TIS_ACPI_INTERRUPT
int
help
acpi_get_gpe() is used to provide interrupt status to TPM layer.
This option specifies the GPE number.
config SOC_INTEL_DEBUG_CONSENT
bool "Enable SOC debug interface"
default n
help
Set this option to enable default debug interface of SoC such as DBC
or DCI.
endif # SOC_INTEL_COMMON
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