blob: 3d2ced95d62fd4cdacd2102c63964e742fe198f3 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
|
config SOC_INTEL_COMMON
bool
help
common code for Intel SOCs
if SOC_INTEL_COMMON
comment "Intel SoC Common Code"
source "src/soc/intel/common/basecode/Kconfig"
source "src/soc/intel/common/block/Kconfig"
config CACHE_MRC_SETTINGS
bool "Save cached MRC settings"
default n
config SOC_INTEL_COMMON_SPI_FLASH_PROTECT
bool
default n
if CACHE_MRC_SETTINGS
config MRC_SETTINGS_CACHE_BASE
hex
default 0xfffe0000
config MRC_SETTINGS_CACHE_SIZE
hex
default 0x10000
config MRC_SETTINGS_PROTECT
bool "Enable protection on MRC settings"
default n
config HAS_RECOVERY_MRC_CACHE
bool
default n
config MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN
bool
default n
config MRC_SETTINGS_VARIABLE_DATA
bool
default n
endif # CACHE_MRC_SETTINGS
config DISPLAY_MTRRS
bool "MTRRs: Display the MTRR settings"
default n
config DISPLAY_SMM_MEMORY_MAP
bool "SMM: Display the SMM memory map"
default n
config SOC_INTEL_COMMON_RESET
bool
default n
config SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
bool
default n
config ACPI_CONSOLE
bool
default n
help
Provide a mechanism for serial console based ACPI debug.
config SOC_INTEL_COMMON_LPSS_I2C
bool
default n
help
This driver supports the Intel Low Power Subsystem (LPSS) I2C
controllers that are based on Synopsys DesignWare IP.
config SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ
int
depends on SOC_INTEL_COMMON_LPSS_I2C
help
The clock speed that the I2C controller is running at, in MHz.
No default is set here as this is an SOC-specific value and must
be provided by the SOC when it selects this driver.
config SOC_INTEL_COMMON_LPSS_I2C_DEBUG
bool "Enable debug output for LPSS I2C transactions"
default n
depends on SOC_INTEL_COMMON_LPSS_I2C
help
Enable debug output for I2C transactions. This can be useful
when debugging I2C drivers.
config MMA
bool "Enable MMA (Memory Margin Analysis) support for Intel Core"
default n
depends on PLATFORM_USES_FSP2_0 || PLATFORM_USES_FSP1_1
help
Set this option to y to enable MMA (Memory Margin Analysis) support
config MMA_BLOBS_PATH
string "Path to MMA blobs"
depends on MMA
default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/mma"
config ADD_VBT_DATA_FILE
bool "Add a Video Bios Table (VBT) binary to CBFS"
help
Add a VBT file data file to CBFS. The VBT describes the integrated
GPU and connections, and is needed by FSP in order to initialize the
display.
config VBT_FILE
string "VBT binary path and filename"
depends on ADD_VBT_DATA_FILE
help
The path and filename of the VBT binary.
config SOC_INTEL_COMMON_GFX_OPREGION
bool
default n
config SOC_INTEL_COMMON_SMI
bool
default n
config SOC_INTEL_COMMON_ACPI
bool
default n
config SOC_INTEL_COMMON_NHLT
bool
default n
endif # SOC_INTEL_COMMON
|
