1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
|
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/mmio.h>
#include <soc/intel/common/hda_verb.h>
#include <soc/ramstage.h>
#include <soc/igd.h>
static const u32 minihd_verb_table[] = {
/* coreboot specific header */
0x80862808, /* Codec Vendor / Device ID: Intel Broadwell Mini-HD */
0x80860101, /* Subsystem ID */
4, /* Number of jacks */
/* Enable 3rd Pin and Converter Widget */
0x00878101,
/* Pin Widget 5 - PORT B */
0x00571c10,
0x00571d00,
0x00571e56,
0x00571f18,
/* Pin Widget 6 - PORT C */
0x00671c20,
0x00671d00,
0x00671e56,
0x00671f18,
/* Pin Widget 7 - PORT D */
0x00771c30,
0x00771d00,
0x00771e56,
0x00771f18,
/* Disable 3rd Pin and Converter Widget */
0x00878100,
/* Dummy entries to fill out the table */
0x00878100,
0x00878100,
};
static void minihd_init(struct device *dev)
{
struct resource *res;
u32 reg32;
u8 *base;
int codec_mask, i;
/* Find base address */
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
base = res2mmio(res, 0, 0);
printk(BIOS_DEBUG, "Mini-HD: base = %p\n", base);
/* Set Bus Master */
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
/* Mini-HD configuration */
reg32 = read32(base + 0x100c);
reg32 &= 0xfffc0000;
reg32 |= 0x4;
write32(base + 0x100c, reg32);
reg32 = read32(base + 0x1010);
reg32 &= 0xfffc0000;
reg32 |= 0x4b;
write32(base + 0x1010, reg32);
/* Init the codec and write the verb table */
codec_mask = hda_codec_detect(base);
if (codec_mask) {
for (i = 3; i >= 0; i--) {
if (codec_mask & (1 << i))
hda_codec_init(base, i, sizeof(minihd_verb_table),
minihd_verb_table);
}
}
/* Set EM4/EM5 registers */
write32(base + 0x0100c, igd_get_reg_em4());
write32(base + 0x01010, igd_get_reg_em5());
}
static struct device_operations minihd_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = minihd_init,
.ops_pci = &pci_dev_ops_pci,
};
static const unsigned short pci_device_ids[] = {
0x0a0c, /* Haswell */
0x160c, /* Broadwell */
0
};
static const struct pci_driver minihd_driver __pci_driver = {
.ops = &minihd_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.devices = pci_device_ids,
};
|