aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/apollolake/pmc.c
blob: c88e14c4c045933bc49da518fc1d7caa0700e90d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
/*
 * This file is part of the coreboot project.
 *
 * Copyright (C) 2016 Intel Corp.
 * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <soc/iomap.h>
#include <soc/pci_ids.h>

/*
 * The ACPI IO BAR (offset 0x20) is not PCI compliant. We've observed cases
 * where the BAR reads back as 0, but the IO window is open. This also means
 * that it will not respond to PCI probing. In the event that probing the BAR
 * fails, we still need to create a resource for it.
 */
static void read_resources(device_t dev)
{
	struct resource *res;
	pci_dev_read_resources(dev);

	res = new_resource(dev, PCI_BASE_ADDRESS_4);
	res->base = ACPI_PMIO_BASE;
	res->size = ACPI_PMIO_SIZE;
	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}

/*
 * Part 2:
 * Resources are assigned, and no other device was given an IO resource to
 * overlap with our ACPI BAR. But because the resource is FIXED,
 * pci_dev_set_resources() will not store it for us. We need to do that
 * explicitly.
 */
static void set_resources(device_t dev)
{
	struct resource *res;

	pci_dev_set_resources(dev);

	res = find_resource(dev, PCI_BASE_ADDRESS_4);
	pci_write_config32(dev, res->index, res->base);
	dev->command |= PCI_COMMAND_IO;
	res->flags |= IORESOURCE_STORED;
	report_resource_stored(dev, res, " ACPI BAR");
}

static const struct device_operations device_ops = {
	.read_resources		= read_resources,
	.set_resources		= set_resources,
	.enable_resources	= pci_dev_enable_resources,
};

static const struct pci_driver pmc __pci_driver = {
	.ops	= &device_ops,
	.vendor	= PCI_VENDOR_ID_INTEL,
	.device	= PCI_DEVICE_ID_APOLLOLAKE_PMC,
};