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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010-2017 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __PICASSO_CHIP_H__
#define __PICASSO_CHIP_H__
#include <stddef.h>
#include <stdint.h>
#include <commonlib/helpers.h>
#include <drivers/i2c/designware/dw_i2c.h>
#include <soc/i2c.h>
#include <arch/acpi_device.h>
#define PICASSO_I2C_DEV_MAX 4
struct soc_amd_picasso_config {
/*
* If sb_reset_i2c_slaves() is called, this devicetree register
* defines which I2C SCL will be toggled 9 times at 100 KHz.
* For example, should we need I2C0 and I2C3 have their slave
* devices reseted by toggling SCL, use:
*
* register i2c_scl_reset = (GPIO_I2C0_SCL | GPIO_I2C3_SCL)
*/
u8 i2c_scl_reset;
struct dw_i2c_bus_config i2c[PICASSO_I2C_DEV_MAX];
};
typedef struct soc_amd_picasso_config config_t;
extern struct device_operations pci_domain_ops;
#endif /* __PICASSO_CHIP_H__ */
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