blob: fd930896a7c881accd62475aae6bee7e3ba9657f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
|
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/device.h>
#include <fsp/api.h>
#include <soc/southbridge.h>
#include <types.h>
#include "chip.h"
static void enable_dev(struct device *dev)
{
}
static void soc_init(void *chip_info)
{
fsp_silicon_init(false); /* no S3 support yet */
fch_init(chip_info);
}
static void soc_final(void *chip_info)
{
fch_final(chip_info);
}
struct chip_operations soc_amd_cezanne_ops = {
CHIP_NAME("AMD Cezanne SoC")
.enable_dev = enable_dev,
.init = soc_init,
.final = soc_final
};
|