index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
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author
committer
range
path:
root
/
src
/
security
/
tpm
/
tss
/
tcg-2.0
Mode
Name
Size
-rw-r--r--
tss.c
10537
log
plain
-rw-r--r--
tss_marshaling.c
17470
log
plain
-rw-r--r--
tss_marshaling.h
1264
log
plain
-rw-r--r--
tss_structures.h
12123
log
plain