summaryrefslogtreecommitdiff
path: root/src/pc80/mc146818rtc.c
blob: 55f161f29eb98dfaf7a56431c8080d596c17977f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
#include <console/console.h>
#include <arch/io.h>
#include <pc80/mc146818rtc.h>
#include <boot/coreboot_tables.h>
#include <string.h>

/* control registers - Moto names
 */
#define RTC_REG_A		10
#define RTC_REG_B		11
#define RTC_REG_C		12
#define RTC_REG_D		13


/**********************************************************************
 * register details
 **********************************************************************/
#define RTC_FREQ_SELECT	RTC_REG_A

/* update-in-progress  - set to "1" 244 microsecs before RTC goes off the bus,
 * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
 * totalling to a max high interval of 2.228 ms.
 */
# define RTC_UIP		0x80
# define RTC_DIV_CTL		0x70
   /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
#  define RTC_REF_CLCK_4MHZ	0x00
#  define RTC_REF_CLCK_1MHZ	0x10
#  define RTC_REF_CLCK_32KHZ	0x20
   /* 2 values for divider stage reset, others for "testing purposes only" */
#  define RTC_DIV_RESET1	0x60
#  define RTC_DIV_RESET2	0x70
  /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
# define RTC_RATE_SELECT 	0x0F
#  define RTC_RATE_NONE		0x00
#  define RTC_RATE_32786HZ	0x01
#  define RTC_RATE_16384HZ	0x02
#  define RTC_RATE_8192HZ	0x03
#  define RTC_RATE_4096HZ	0x04
#  define RTC_RATE_2048HZ	0x05
#  define RTC_RATE_1024HZ	0x06
#  define RTC_RATE_512HZ	0x07
#  define RTC_RATE_256HZ	0x08
#  define RTC_RATE_128HZ	0x09
#  define RTC_RATE_64HZ		0x0a
#  define RTC_RATE_32HZ		0x0b
#  define RTC_RATE_16HZ		0x0c
#  define RTC_RATE_8HZ		0x0d
#  define RTC_RATE_4HZ		0x0e
#  define RTC_RATE_2HZ		0x0f

/**********************************************************************/
#define RTC_CONTROL	RTC_REG_B
# define RTC_SET 0x80		/* disable updates for clock setting */
# define RTC_PIE 0x40		/* periodic interrupt enable */
# define RTC_AIE 0x20		/* alarm interrupt enable */
# define RTC_UIE 0x10		/* update-finished interrupt enable */
# define RTC_SQWE 0x08		/* enable square-wave output */
# define RTC_DM_BINARY 0x04	/* all time/date values are BCD if clear */
# define RTC_24H 0x02		/* 24 hour mode - else hours bit 7 means pm */
# define RTC_DST_EN 0x01	/* auto switch DST - works f. USA only */

/**********************************************************************/
#define RTC_INTR_FLAGS	RTC_REG_C
/* caution - cleared by read */
# define RTC_IRQF 0x80		/* any of the following 3 is active */
# define RTC_PF 0x40
# define RTC_AF 0x20
# define RTC_UF 0x10

/**********************************************************************/
#define RTC_VALID	RTC_REG_D
# define RTC_VRT 0x80		/* valid RAM and time */
/**********************************************************************/

static inline unsigned char cmos_read(unsigned char addr)
{
	int offs = 0;
	if (addr >= 128) {
		offs = 2;
		addr -= 128;
	}
	outb(addr, RTC_BASE_PORT + offs + 0);
	return inb(RTC_BASE_PORT + offs + 1);
}

static inline void cmos_write(unsigned char val, unsigned char addr)
{
	int offs = 0;
	if (addr >= 128) {
		offs = 2;
		addr -= 128;
	}
	outb(addr, RTC_BASE_PORT + offs + 0);
	outb(val, RTC_BASE_PORT + offs + 1);
}

static int rtc_checksum_valid(int range_start, int range_end, int cks_loc)
{
	int i;
	unsigned sum, old_sum;
	sum = 0;
	for(i = range_start; i <= range_end; i++) {
		sum += cmos_read(i);
	}
	sum = (~sum)&0x0ffff;
	old_sum = ((cmos_read(cks_loc)<<8) | cmos_read(cks_loc+1))&0x0ffff;
	return sum == old_sum;
}

static void rtc_set_checksum(int range_start, int range_end, int cks_loc)
{
	int i;
	unsigned sum;
	sum = 0;
	for(i = range_start; i <= range_end; i++) {
		sum += cmos_read(i);
	}
	sum = ~(sum & 0x0ffff);
	cmos_write(((sum >> 8) & 0x0ff), cks_loc);
	cmos_write(((sum >> 0) & 0x0ff), cks_loc+1);
}

#define RTC_CONTROL_DEFAULT (RTC_24H)
#define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)

#if 0 /* alpha setup */
#undef RTC_CONTROL_DEFAULT
#undef RTC_FREQ_SELECT_DEFAULT
#define RTC_CONTROL_DEFAULT (RTC_SQWE | RTC_24H)
#define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
#endif

void rtc_init(int invalid)
{
	unsigned char x;
	int cmos_invalid, checksum_invalid;

	printk_debug("RTC Init\n");

#if HAVE_OPTION_TABLE
	/* See if there has been a CMOS power problem. */
	x = cmos_read(RTC_VALID);
	cmos_invalid = !(x & RTC_VRT);

	/* See if there is a CMOS checksum error */
	checksum_invalid = !rtc_checksum_valid(PC_CKS_RANGE_START,
			PC_CKS_RANGE_END,PC_CKS_LOC);

	if (invalid || cmos_invalid || checksum_invalid) {
		printk_warning("RTC:%s%s%s zeroing cmos\n",
			invalid?" Clear requested":"", 
			cmos_invalid?" Power Problem":"",
			checksum_invalid?" Checksum invalid":"");
#if 0
		cmos_write(0, 0x01);
		cmos_write(0, 0x03);
		cmos_write(0, 0x05);
		for(i = 10; i < 48; i++) {
			cmos_write(0, i);
		}
		
		if (cmos_invalid) {
			/* Now setup a default date of Sat 1 January 2000 */
			cmos_write(0, 0x00); /* seconds */
			cmos_write(0, 0x02); /* minutes */
			cmos_write(1, 0x04); /* hours */
			cmos_write(7, 0x06); /* day of week */
			cmos_write(1, 0x07); /* day of month */
			cmos_write(1, 0x08); /* month */
			cmos_write(0, 0x09); /* year */
		}
#endif
	}
#endif

	/* Setup the real time clock */
	cmos_write(RTC_CONTROL_DEFAULT, RTC_CONTROL);
	/* Setup the frequency it operates at */
	cmos_write(RTC_FREQ_SELECT_DEFAULT, RTC_FREQ_SELECT);

#if HAVE_OPTION_TABLE
	/* See if there is a LB CMOS checksum error */
	checksum_invalid = !rtc_checksum_valid(LB_CKS_RANGE_START,
			LB_CKS_RANGE_END,LB_CKS_LOC);
	if(checksum_invalid)
		printk_debug("Invalid CMOS LB checksum\n");

	/* Make certain we have a valid checksum */
	rtc_set_checksum(PC_CKS_RANGE_START,
                        PC_CKS_RANGE_END,PC_CKS_LOC);
#endif

	/* Clear any pending interrupts */
	(void) cmos_read(RTC_INTR_FLAGS);
}


#if USE_OPTION_TABLE == 1
/*
 * Functions to save/return values stored in the 256byte cmos.
 *
 * To be able to use space maximally we want to only store as many bits as
 * needed, and not be limited by byte boundaries. We therefor clamp the size
 * down to an unsigned int. Since the values that we are allowed to touch are
 * either an enum or a hexadecimal value, this size should suit most purposes.
 *
 * These two functions are doing bitshifting, and are therefor a bit
 * nontrivial. To understand these operations, first read the ones outside the
 * loop. The ones inside the loop are just adding i to the same calculations,
 * with the shift twice inverted, as negative shifts aren't nice.
 */
static unsigned int
get_cmos_value(int bit, int length)
{
    unsigned int tmp;
    int i;

    /* negative left shift --> right shift */
    tmp = cmos_read(bit / 8) >> (bit % 8);

    for (i = 1; (8 * i) < ((bit % 8) + length); i++)
	tmp |= cmos_read((bit / 8) + i) << ((8 * i) - (bit % 8));

    /* 1 << 32 - 1 isn't cool inside an int */
    if (length != 32)
	tmp &= (1 << length) - 1;

    return tmp;
}

static void
set_cmos_value(int bit, int length, unsigned int value)
{
	unsigned int mask;
	unsigned char cmos;
	int i;

	/* 1 << 32 - 1 isn't cool inside an int */
	if (length != 32)
	    mask = (1 << length) - 1;
	else
	    mask = -1;

	value &= mask;

	/* negative right shifts --> left shifts */
	cmos = cmos_read(bit / 8);
	cmos &= ~(mask << (bit % 8));
	cmos |= value << (bit % 8);
	cmos_write(cmos, bit / 8);

	for (i = 1; (8 * i) < ((bit % 8) + length); i++) {
		cmos = cmos_read((bit / 8) + i);
		cmos &= ~(mask >> ((8 * i) - (bit % 8)));
		cmos |= value >> ((8 * i) - (bit % 8));
		cmos_write(cmos, (bit / 8) + i);
	}
}

int
get_option(char *name, unsigned int *value)
{
	extern struct cmos_option_table option_table;
	struct cmos_option_table *ct;
	struct cmos_entries *ce;
	size_t namelen;
	int found=0;

	/* Figure out how long name is */
	namelen = strnlen(name, CMOS_MAX_NAME_LENGTH);

	/* find the requested entry record */
	ct=&option_table;
	ce=(struct cmos_entries*)((unsigned char *)ct + ct->header_length);
	for(;ce->tag==LB_TAG_OPTION;
		ce=(struct cmos_entries*)((unsigned char *)ce + ce->size)) {
		if (memcmp(ce->name, name, namelen) == 0) {
			found=1;
			break;
		}
	}
	if(!found) {
		printk_err("ERROR: No cmos option '%s'\n", name);
		return(-2);
	}

	if (ce->length > 32) {
		printk_err("ERROR: cmos option '%s' is too large.\n", name);
		return -3;
	}


	*value = get_cmos_value(ce->bit, ce->length);

	if(!rtc_checksum_valid(LB_CKS_RANGE_START,
			       LB_CKS_RANGE_END,LB_CKS_LOC))
		return(-4);
	return(0);
}

int
set_option(char *name, unsigned int value)
{
	extern struct cmos_option_table option_table;
	struct cmos_option_table *ct;
	struct cmos_entries *ce;
	size_t namelen;
	int found = 0;

	/* Figure out how long name is */
	namelen = strnlen(name, CMOS_MAX_NAME_LENGTH);

	/* find the requested entry record */
	ct = &option_table;
	ce = (struct cmos_entries*) ((unsigned char *) ct + ct->header_length);

	for(;ce->tag==LB_TAG_OPTION;
		ce=(struct cmos_entries*)((unsigned char *)ce + ce->size)) {
		if (memcmp(ce->name, name, namelen) == 0) {
			found=1;
			break;
		}
	}

	if (!found) {
		printk_err("ERROR: Unknown cmos option '%s'\n", name);
		return(-2);
	}

	if (ce->length > 32) {
		printk_err("ERROR: cmos option '%s' is too large.\n", name);
		return -3;
	}

	set_cmos_value(ce->bit, ce->length, value);

	/* We should not update the checksum here. */

	return 0;
}
#else
int
get_option(char *name, unsigned int *value)
{
	return -2;
}

int
set_option(char *name, unsigned int value)
{
	return -2;
}

#endif /* USE_OPTION_TABLE */