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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "hostbridge.asl"
#include "../iomap.h"
#include <southbridge/intel/i82801gx/i82801gx.h>
/* PCI Device Resource Consumption */
Device (PDRC)
{
Name (_HID, EISAID("PNP0C02"))
Name (_UID, 1)
/* This does not seem to work correctly yet - set values statically for
* now.
*/
Name (PDRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) /* RCBA */
Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000)
Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000)
Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000)
Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) /* Misc ICH */
Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) /* Misc ICH */
Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) /* Misc ICH */
})
/* Current Resource Settings */
Method (_CRS, 0, Serialized)
{
Return(PDRS)
}
}
// PCIe graphics port 0:1.0
#include "peg.asl"
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