aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/e7501/raminit.h
blob: 4f783b8cd70fae69635101c24a422896b22d8592 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
#ifndef RAMINIT_H
#define RAMINIT_H

#define MAX_DIMM_SOCKETS_PER_CHANNEL 4
#define MAX_NUM_CHANNELS 2
#define MAX_DIMM_SOCKETS (MAX_NUM_CHANNELS * MAX_DIMM_SOCKETS_PER_CHANNEL)

struct mem_controller {
	device_t d0, d0f1;					// PCI bus/device/fcns of E7501 memory controller 

	// SMBus addresses of DIMM slots for each channel,
	// in order from closest to MCH to furthest away
	// 0 == not present
	uint16_t channel0[MAX_DIMM_SOCKETS_PER_CHANNEL];	
	uint16_t channel1[MAX_DIMM_SOCKETS_PER_CHANNEL];
};


#endif /* RAMINIT_H */