1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
|
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "amdk8.h"
#define RES_DEBUG 0
void setup_resource_map_offset(const unsigned int *register_values, int max, unsigned offset_pci_dev, unsigned offset_io_base)
{
int i;
#if RES_DEBUG
printk(BIOS_DEBUG, "setting up resource map offset....\n");
#endif
for (i = 0; i < max; i += 3) {
pci_devfn_t dev;
unsigned where;
unsigned long reg = 0;
#if RES_DEBUG
prink_debug("%08x <- %08x\n", register_values[i] + offset_pci_dev, register_values[i+2]);
#endif
dev = (register_values[i] & ~0xfff) + offset_pci_dev;
where = register_values[i] & 0xfff;
if (register_values[i+1])
reg = pci_read_config32(dev, where);
reg &= register_values[i+1];
reg |= register_values[i+2] + offset_io_base;
pci_write_config32(dev, where, reg);
}
#if RES_DEBUG
printk(BIOS_DEBUG, "done.\n");
#endif
}
#define RES_PCI_IO 0x10
#define RES_PORT_IO_8 0x22
#define RES_PORT_IO_32 0x20
#define RES_MEM_IO 0x40
static void setup_resource_map_x_offset(const unsigned int *register_values, int max, unsigned offset_pci_dev, unsigned offset_io_base)
{
int i;
#if RES_DEBUG
printk(BIOS_DEBUG, "setting up resource map ex offset....\n");
#endif
for (i = 0; i < max; i += 4) {
#if RES_DEBUG
printk(BIOS_DEBUG, "%04x: %02x %08x <- & %08x | %08x\n",
i>>2, register_values[i],
register_values[i+1] + ((register_values[i]==RES_PCI_IO) ? offset_pci_dev : 0),
register_values[i+2],
register_values[i+3] + (((register_values[i] & RES_PORT_IO_32) == RES_PORT_IO_32) ? offset_io_base : 0)
);
#endif
switch (register_values[i]) {
case RES_PCI_IO: //PCI
{
pci_devfn_t dev;
unsigned where;
unsigned long reg = 0;
dev = (register_values[i+1] & ~0xfff) + offset_pci_dev;
where = register_values[i+1] & 0xfff;
if (register_values[i+2])
reg = pci_read_config32(dev, where);
reg &= register_values[i+2];
reg |= register_values[i+3];
pci_write_config32(dev, where, reg);
}
break;
case RES_PORT_IO_8: // io 8
{
unsigned where;
unsigned reg = 0;
where = register_values[i+1] + offset_io_base;
if (register_values[i+2])
reg = inb(where);
reg &= register_values[i+2];
reg |= register_values[i+3];
outb(reg, where);
}
break;
case RES_PORT_IO_32: //io32
{
unsigned where;
unsigned long reg = 0;
where = register_values[i+1] + offset_io_base;
if (register_values[i+2])
reg = inl(where);
reg &= register_values[i+2];
reg |= register_values[i+3];
outl(reg, where);
}
break;
} // switch
}
#if RES_DEBUG
printk(BIOS_DEBUG, "done.\n");
#endif
}
static inline void setup_resource_map_x(const unsigned int *register_values, int max)
{
setup_resource_map_x_offset(register_values, max, 0, 0);
}
|
