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##
## This file is part of the coreboot project.
##
## Copyright (C) 2008 VIA Technologies, Inc.
## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
chip northbridge/via/cn400 # Northbridge
device apic_cluster 0 on # APIC cluster
chip cpu/via/model_c3 # VIA C3
device apic 0 on end # APIC
end
end
device pci_domain 0 on # PCI domain
device pci 0.0 on end # AGP Bridge
device pci 0.1 on end # Error Reporting
device pci 0.2 on end # Host Bus Control
device pci 0.3 on end # Memory Controller
device pci 0.4 on end # Power Management
device pci 0.7 on end # V-Link Controller
device pci 1.0 on end # PCI Bridge
chip southbridge/via/vt8237r # Southbridge
# Enable both IDE channels.
register "ide0_enable" = "1"
register "ide1_enable" = "1"
# Both cables are 40pin.
register "ide0_80pin_cable" = "0"
register "ide1_80pin_cable" = "0"
device pci f.0 on end # IDE/SATA
device pci f.1 on end # IDE
register "fn_ctrl_lo" = "0xC0" # Disable AC/MC97
register "fn_ctrl_hi" = "0x9d" # Disable USB Direct & LAN Gating
device pci 10.0 on end # OHCI
device pci 10.1 on end # OHCI
device pci 10.2 on end # OHCI
device pci 10.3 on end # OHCI
device pci 10.4 on end # EHCI
device pci 10.5 off end # USB Direct
device pci 11.0 on # Southbridge LPC
chip superio/winbond/w83697hf # Super I/O
device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 2e.1 off # Parallel Port
io 0x60 = 0x378
irq 0x70 = 7
drq 0x74 = 3
end
device pnp 2e.2 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.3 off # COM2
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.6 off # IR Port
io 0x60 = 0x000
end
device pnp 2e.7 off # GPIO 1
io 0x60 = 0x201 # 0x201
end
device pnp 2e.8 off # GPIO 5
io 0x60 = 0x330 # 0x330
end
device pnp 2e.9 off # GPIO 2, 3,and 4
io 0x60 = 0x000 #
end
device pnp 2e.a off # ACPI
io 0x60 = 0x000 #
end
device pnp 2e.b on # HWM
io 0x60 = 0x290
irq 0x70 = 0
end
end
end
device pci 11.5 off end # AC'97 audio
device pci 11.6 off end # AC'97 Modem
device pci 12.0 on end # Ethernet
end
end
end
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