1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "agesawrapper.h"
#include "amdlib.h"
#include "BiosCallOuts.h"
#include "Ids.h"
#include "OptionsIds.h"
#include "heapManager.h"
#include <northbridge/amd/agesa/family15/dimmSpd.h>
#include <arch/io.h>
#ifdef __PRE_RAM__
/* These defines are used to select the appropriate socket for the SPD read
* because this is a multi-socket design.
*/
#define PCI_REG_GPIO_48_47_46_37_CNTRL (0xA6)
#define PCI_REG_GPIO_52_to_49_CNTRL (0x50)
#define GPIO_OUT_BIT_GPIO48 (BIT3)
#define GPIO_OUT_BIT_GPIO49 (BIT0)
#define GPIO_OUT_ENABLE_BIT_GPIO48 (BIT7)
#define GPIO_OUT_ENABLE_BIT_GPIO49 (BIT4)
static UINT8 select_socket(UINT8 socket_id)
{
device_t sm_dev = PCI_DEV(0, 0x14, 0); //SMBUS
UINT8 value = 0;
UINT8 gpio52_to_49 = 0;
/* Configure GPIO49,48 to select the desired socket
* GPIO49,48 control the IDTQS3253 S1,S0
* S1 S0 true table
* 0 0 channel 0
* 0 1 channel 1
* 1 0 channel 2 - Socket 0
* 1 1 channel 3 - Socket 1
* Note: Above is abstracted from Schematic. But actually it seems to be other way.
* 1 0 channel 2 - Socket 1
* 1 1 channel 3 - Socket 0
* Note: The DIMMs need to be plugged in from the farthest slot for each channel.
*/
gpio52_to_49 = pci_read_config8(sm_dev, PCI_REG_GPIO_52_to_49_CNTRL);
value = gpio52_to_49 | GPIO_OUT_BIT_GPIO49; // Output of GPIO49 is always forced to "1"
value &= ~(GPIO_OUT_ENABLE_BIT_GPIO49); // 0=Output Enabled, 1=Tristate
pci_write_config8(sm_dev, PCI_REG_GPIO_52_to_49_CNTRL, value);
value = pci_read_config8(sm_dev, PCI_REG_GPIO_48_47_46_37_CNTRL);
value &= ~(GPIO_OUT_BIT_GPIO48);
value |= (~(socket_id & 1)) << 3; // Output of GPIO48 is inverse of SocketId
value &= ~(GPIO_OUT_ENABLE_BIT_GPIO48); // 0=Output Enabled, 1=Tristate
pci_write_config8(sm_dev, PCI_REG_GPIO_48_47_46_37_CNTRL, value);
return gpio52_to_49;
}
static void restore_socket(UINT8 original_value)
{
device_t sm_dev = PCI_DEV(0, 0x14, 0); //SMBUS
pci_write_config8(sm_dev, PCI_REG_GPIO_52_to_49_CNTRL, original_value);
// TODO: Restore previous GPIO48 configurations?
//pci_write_config8(sm_dev, PCI_REG_GPIO_48_47_46_37_CNTRL, gpio48_47_46_37_save);
}
#endif
STATIC BIOS_CALLOUT_STRUCT BiosCallouts[] =
{
{
AGESA_ALLOCATE_BUFFER,
BiosAllocateBuffer
},
{
AGESA_DEALLOCATE_BUFFER,
BiosDeallocateBuffer
},
{
AGESA_DO_RESET,
BiosReset
},
{
AGESA_LOCATE_BUFFER,
BiosLocateBuffer
},
{
AGESA_READ_SPD,
BiosReadSpd
},
{
AGESA_READ_SPD_RECOVERY,
BiosDefaultRet
},
{
AGESA_RUNFUNC_ONAP,
BiosRunFuncOnAp
},
{
AGESA_GET_IDS_INIT_DATA,
BiosGetIdsInitData
},
{
AGESA_HOOKBEFORE_DQS_TRAINING,
BiosHookBeforeDQSTraining
},
{
AGESA_HOOKBEFORE_DRAM_INIT,
BiosHookBeforeDramInit
},
{
AGESA_HOOKBEFORE_EXIT_SELF_REF,
BiosHookBeforeExitSelfRefresh
},
};
AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
UINTN i;
AGESA_STATUS CalloutStatus;
UINTN CallOutCount = sizeof (BiosCallouts) / sizeof (BiosCallouts [0]);
for (i = 0; i < CallOutCount; i++) {
if (BiosCallouts[i].CalloutName == Func) {
break;
}
}
if(i >= CallOutCount) {
return AGESA_UNSUPPORTED;
}
CalloutStatus = BiosCallouts[i].CalloutPtr (Func, Data, ConfigPtr);
return CalloutStatus;
}
CONST IDS_NV_ITEM IdsData[] =
{
/*{
AGESA_IDS_NV_MAIN_PLL_CON,
0x1
},
{
AGESA_IDS_NV_MAIN_PLL_FID_EN,
0x1
},
{
AGESA_IDS_NV_MAIN_PLL_FID,
0x8
},
{
AGESA_IDS_NV_CUSTOM_NB_PSTATE,
},
{
AGESA_IDS_NV_CUSTOM_NB_P0_DIV_CTRL,
},
{
AGESA_IDS_NV_CUSTOM_NB_P1_DIV_CTRL,
},
{
AGESA_IDS_NV_FORCE_NB_PSTATE,
},
*/
{
0xFFFF,
0xFFFF
}
};
#define NUM_IDS_ENTRIES (sizeof (IdsData) / sizeof (IDS_NV_ITEM))
AGESA_STATUS BiosGetIdsInitData (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
UINTN i;
IDS_NV_ITEM *IdsPtr;
IdsPtr = ((IDS_CALLOUT_STRUCT *) ConfigPtr)->IdsNvPtr;
if (Data == IDS_CALLOUT_INIT) {
for (i = 0; i < NUM_IDS_ENTRIES; i++) {
IdsPtr[i].IdsNvValue = IdsData[i].IdsNvValue;
IdsPtr[i].IdsNvId = IdsData[i].IdsNvId;
}
}
return AGESA_SUCCESS;
}
AGESA_STATUS BiosReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
AGESA_STATUS Status;
#ifdef __PRE_RAM__
UINT8 original_value = 0;
if (ConfigPtr == NULL)
return AGESA_ERROR;
original_value = select_socket(((AGESA_READ_SPD_PARAMS *)ConfigPtr)->SocketId);
Status = agesa_ReadSPD (Func, Data, ConfigPtr);
restore_socket(original_value);
#else
Status = AGESA_UNSUPPORTED;
#endif
return Status;
}
/* Call the host environment interface to provide a user hook opportunity. */
AGESA_STATUS BiosHookBeforeDQSTraining (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
return AGESA_SUCCESS;
}
/* Call the host environment interface to provide a user hook opportunity. */
AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
return AGESA_SUCCESS;
}
/* Call the host environment interface to provide a user hook opportunity. */
AGESA_STATUS BiosHookBeforeExitSelfRefresh (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
return AGESA_SUCCESS;
}
|
