blob: c9bd5c7d18d81d248174d9d449d6afb88c1160f4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/acpi.h>
DefinitionBlock(
"dsdt.aml",
"DSDT",
0x02, // DSDT revision: ACPI v2.0 and up
OEM_ID,
ACPI_TABLE_CREATOR,
0x20090419 // OEM revision
)
{
#include "acpi/platform.asl"
// global NVS and variables
#include <southbridge/intel/i82801ix/acpi/globalnvs.asl>
#include <southbridge/intel/common/acpi/platform.asl>
// General Purpose Events
#include "acpi/gpe.asl"
// mainboard specific devices
#include "acpi/mainboard.asl"
#include <cpu/intel/speedstep/acpi/cpu.asl>
// Thermal Zone
#include "acpi/thermal.asl"
Scope (\_SB) {
Device (PCI0)
{
#include <northbridge/intel/gm45/acpi/gm45.asl>
#include <southbridge/intel/i82801ix/acpi/ich9.asl>
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
}
}
#include <southbridge/intel/common/acpi/sleepstates.asl>
}
|
