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##
## This file is part of the coreboot project.
##
## Copyright (C) 2008 Joseph Smith <joe@smittys.pointclark.net>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
uses CC
uses CONFIG_CONSOLE_SERIAL8250
uses CONFIG_CONSOLE_VGA
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
uses CONFIG_IOAPIC
uses CONFIG_PCI_ROM_RUN
uses CONFIG_ROM_PAYLOAD
uses CONFIG_ROM_PAYLOAD_START
uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
uses CONFIG_UDELAY_TSC
uses CONFIG_VIDEO_MB
uses CROSS_COMPILE
uses DEFAULT_CONSOLE_LOGLEVEL
uses FALLBACK_SIZE
uses HAVE_ACPI_TABLES
uses HAVE_FALLBACK_BOOT
uses HAVE_MP_TABLE
uses HAVE_OPTION_TABLE
uses HAVE_PIRQ_TABLE
uses HEAP_SIZE
uses HOSTCC
uses IRQ_SLOT_COUNT
uses COREBOOT_EXTRA_VERSION
uses MAINBOARD
uses MAINBOARD_VENDOR
uses MAINBOARD_PART_NUMBER
uses MAXIMUM_CONSOLE_LOGLEVEL
uses OBJCOPY
uses PAYLOAD_SIZE
uses _RAMBASE
uses _ROMBASE
uses ROM_IMAGE_SIZE
uses ROM_SECTION_SIZE
uses ROM_SECTION_OFFSET
uses ROM_SIZE
uses STACK_SIZE
uses TTYS0_BASE
uses TTYS0_BAUD
uses TTYS0_LCS
uses USE_FALLBACK_IMAGE
uses USE_OPTION_TABLE
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
default ROM_SIZE = 512 * 1024
default ROM_IMAGE_SIZE = 128 * 1024
default HAVE_FALLBACK_BOOT = 1
default FALLBACK_SIZE = 512 * 1024
default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default HAVE_PIRQ_TABLE = 1
default IRQ_SLOT_COUNT = 7
default HAVE_MP_TABLE = 0
default HAVE_ACPI_TABLES = 0
default CONFIG_IOAPIC = 0
default HAVE_OPTION_TABLE = 0
default CONFIG_CONSOLE_VGA = 0
default CONFIG_PCI_ROM_RUN = 0
default CONFIG_VIDEO_MB = 0
default STACK_SIZE = 0x2000
default HEAP_SIZE = 0x4000
default _RAMBASE = 0x00004000
default USE_OPTION_TABLE = 0
default CONFIG_ROM_PAYLOAD = 1
default CC="$(CROSS_COMPILE)gcc -m32"
default HOSTCC="gcc"
default CONFIG_CONSOLE_SERIAL8250 = 1
default TTYS0_BAUD = 115200
default TTYS0_BASE = 0x3f8
default TTYS0_LCS = 0x3 # 8n1
default DEFAULT_CONSOLE_LOGLEVEL = 9
default MAXIMUM_CONSOLE_LOGLEVEL = 9
default MAINBOARD_VENDOR = "RCA"
default MAINBOARD_PART_NUMBER = "RM4100"
end
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