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/* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/ramstage.h>
#include <variant/gpio.h>
void mainboard_silicon_init_params(FSP_S_CONFIG *params)
{
/* Configure pads prior to SiliconInit() in case there's any
* dependencies during hardware initialization. */
size_t num_gpios;
const struct pad_config *gpio_table = variant_gpio_table(&num_gpios);
cnl_configure_pads(gpio_table, num_gpios);
/* Limit SATA speed to 3Gbps until correct HSIO PHY settings determined */
params->SataSpeedLimit = 2;
}
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