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/*
* This file is part of the coreboot project.
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <stdint.h>
#include <amdblocks/acpimmio.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <northbridge/amd/agesa/state_machine.h>
#include "gpio_ftns.h"
static void early_lpc_init(void);
void board_BeforeAgesa(struct sysinfo *cb)
{
u32 val;
early_lpc_init();
/* Disable SVI2 controller to wait for command completion */
val = pci_read_config32(PCI_DEV(0, 0x18, 5), 0x12C);
if (!(val & (1 << 30))) {
val |= (1 << 30);
pci_write_config32(PCI_DEV(0, 0x18, 5), 0x12C, val);
}
/* Release GPIO32/33 for other uses. */
pm_write8(0xea, 1);
/*
* Assert resets on the PCIe slots, since AGESA calls deassert callout
* only. Only apu2 uses GPIOs to reset PCIe slots.
*/
if (CONFIG(BOARD_PCENGINES_APU2)) {
gpio1_write8(0xa, gpio1_read8(0xa) & ~(1 << 6));
gpio1_write8(0xe, gpio1_read8(0xe) & ~(1 << 6));
}
}
static void early_lpc_init(void)
{
u32 setting = 0x0;
//
// Configure output disabled, value low, pull up/down disabled
//
if (CONFIG(BOARD_PCENGINES_APU5)) {
configure_gpio(IOMUX_GPIO_22, Function0, GPIO_22, setting);
}
if (CONFIG(BOARD_PCENGINES_APU2) ||
CONFIG(BOARD_PCENGINES_APU3) ||
CONFIG(BOARD_PCENGINES_APU4)) {
configure_gpio(IOMUX_GPIO_32, Function0, GPIO_32, setting);
}
configure_gpio(IOMUX_GPIO_49, Function2, GPIO_49, setting);
configure_gpio(IOMUX_GPIO_50, Function2, GPIO_50, setting);
configure_gpio(IOMUX_GPIO_71, Function0, GPIO_71, setting);
//
// Configure output enabled, value low, pull up/down disabled
//
setting = GPIO_OUTPUT_ENABLE;
if (CONFIG(BOARD_PCENGINES_APU3) ||
CONFIG(BOARD_PCENGINES_APU4)) {
configure_gpio(IOMUX_GPIO_33, Function0, GPIO_33, setting);
}
configure_gpio(IOMUX_GPIO_57, Function1, GPIO_57, setting);
configure_gpio(IOMUX_GPIO_58, Function1, GPIO_58, setting);
configure_gpio(IOMUX_GPIO_59, Function3, GPIO_59, setting);
//
// Configure output enabled, value high, pull up/down disabled
//
setting = GPIO_OUTPUT_ENABLE | GPIO_OUTPUT_VALUE;
if (CONFIG(BOARD_PCENGINES_APU5)) {
configure_gpio(IOMUX_GPIO_32, Function0, GPIO_32, setting);
configure_gpio(IOMUX_GPIO_33, Function0, GPIO_33, setting);
}
configure_gpio(IOMUX_GPIO_51, Function2, GPIO_51, setting);
configure_gpio(IOMUX_GPIO_55, Function3, GPIO_55, setting);
configure_gpio(IOMUX_GPIO_64, Function2, GPIO_64, setting);
configure_gpio(IOMUX_GPIO_68, Function0, GPIO_68, setting);
}
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