1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
|
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <console/console.h>
#include <drivers/ipmi/ipmi_kcs.h>
#include <drivers/ipmi/ipmi_ops.h>
#include <drivers/vpd/vpd.h>
#include <string.h>
#include "ipmi.h"
#include "vpd.h"
enum cb_err ipmi_set_ppin(struct ppin_req *req)
{
int ret;
struct ipmi_rsp rsp;
ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0, IPMI_OEM_SET_PPIN,
(const unsigned char *) req, sizeof(*req),
(unsigned char *) &rsp, sizeof(rsp));
if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) {
printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n",
__func__, ret, rsp.completion_code);
return CB_ERR;
}
return CB_SUCCESS;
}
enum cb_err ipmi_get_pcie_config(uint8_t *pcie_config)
{
int ret;
struct ipmi_config_rsp {
struct ipmi_rsp resp;
uint8_t config;
} __packed;
struct ipmi_config_rsp rsp;
ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0,
IPMI_OEM_GET_PCIE_CONFIG, NULL, 0, (unsigned char *) &rsp,
sizeof(rsp));
if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) {
printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n",
__func__, ret, rsp.resp.completion_code);
return CB_ERR;
}
*pcie_config = rsp.config;
return CB_SUCCESS;
}
enum cb_err ipmi_get_slot_id(uint8_t *slot_id)
{
int ret;
struct ipmi_config_rsp {
struct ipmi_rsp resp;
uint8_t board_sku_id;
uint8_t board_rev_id;
uint8_t slot_id;
uint8_t slot_config_id;
} __packed;
struct ipmi_config_rsp rsp;
ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0, IPMI_OEM_GET_BOARD_ID,
NULL, 0, (unsigned char *) &rsp, sizeof(rsp));
if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) {
printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n",
__func__, ret, rsp.resp.completion_code);
return CB_ERR;
}
*slot_id = rsp.slot_id;
return CB_SUCCESS;
}
void init_frb2_wdt(void)
{
char val[VPD_LEN];
/* Enable FRB2 timer by default. */
u8 enable = 1;
uint16_t countdown;
if (vpd_get_bool(FRB2_TIMER, VPD_RW_THEN_RO, &enable)) {
if (!enable) {
printk(BIOS_DEBUG, "Disable FRB2 timer\n");
ipmi_stop_bmc_wdt(CONFIG_BMC_KCS_BASE);
return;
}
}
if (enable) {
if (vpd_gets(FRB2_COUNTDOWN, val, VPD_LEN, VPD_RW_THEN_RO)) {
countdown = (uint16_t)atol(val);
printk(BIOS_DEBUG, "FRB2 timer countdown set to: %d ms\n",
countdown * 100);
} else {
printk(BIOS_DEBUG, "FRB2 timer use default value: %d ms\n",
DEFAULT_COUNTDOWN * 100);
countdown = DEFAULT_COUNTDOWN;
}
ipmi_init_and_start_bmc_wdt(CONFIG_BMC_KCS_BASE, countdown,
TIMEOUT_HARD_RESET);
}
}
|
