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chip northbridge/intel/sandybridge
register "spd_addresses" = "{0x50, 0, 0x52, 0}"
device domain 0 on
subsystemid 0x1462 0x7707 inherit
device ref host_bridge on end # Host bridge
device ref peg10 on end # PCIe Bridge for discrete graphics
device ref igd off end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "docking_supported" = "0"
register "gen1_dec" = "0x000c0291"
register "gen2_dec" = "0x000c0a01"
register "pcie_port_coalesce" = "true"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x33"
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "gpe0_en" = "0x28000040"
register "usb_port_config" = "{
{1, 0, 0},
{1, 0, 0},
{1, 0, 1},
{1, 0, 1},
{1, 0, 2},
{1, 0, 2},
{1, 0, 3},
{1, 0, 3},
{1, 0, 4},
{1, 0, 4},
{1, 0, 6},
{1, 0, 5},
{1, 0, 5},
{1, 0, 6}
}"
device ref mei1 on end # Management Engine Interface 1
device ref mei2 off end # Management Engine Interface 2
device ref me_ide_r off end # Management Engine IDE-R
device ref me_kt off end # Management Engine KT
device ref gbe on end # Intel Gigabit Ethernet
device ref ehci2 on end # USB2 EHCI #2
device ref hda on end # HD Audio controller
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 off end # PCIe Port #2
device ref pcie_rp3 off end # PCIe Port #3
device ref pcie_rp4 off end # PCIe Port #4
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 on end # PCIe Port #7
device ref pcie_rp8 off end # PCIe Port #8
device ref ehci1 on end # USB2 EHCI #1
device ref pci_bridge off end # PCI bridge
device ref lpc on # LPC bridge
chip superio/fintek/f71808a
register "multi_function_register_0" = "0x00" # 0x28
register "multi_function_register_1" = "0xc0" # 0x29
register "multi_function_register_2" = "0x20" # 0x2a
register "multi_function_register_3" = "0x4f" # 0x2b
register "multi_function_register_4" = "0x90" # 0x2c
register "hwm_peci_tsi_ctrl" = "0x02" # 0x0a - PECI enabled, 1.23 V
register "hwm_tcc_temp" = "0x64" # 0x0c - TCC temperature = 100 °C
register "hwm_fan1_seg1_speed" = "0xff" # 0xaa - Fan 1 segment 1
register "hwm_fan1_seg2_speed" = "0xe2" # 0xab - Fan 1 segment 2
register "hwm_fan1_seg3_speed" = "0xaf" # 0xac - Fan 1 segment 3
register "hwm_fan1_seg4_speed" = "0x89" # 0xad - Fan 1 segment 4
register "hwm_fan1_seg5_speed" = "0x72" # 0xae - Fan 1 segment 5
register "hwm_fan1_temp_src" = "0x10" # 0xaf - Fan 1 source = PECI
register "hwm_fan2_seg1_speed" = "0xff" # 0xba - Fan 2 segment 1 = 100%
register "hwm_fan2_seg2_speed" = "0xd9" # 0xbb - Fan 2 segment 2 = 86%
register "hwm_fan2_seg3_speed" = "0xb2" # 0xbc - Fan 2 segment 3 = 74%
register "hwm_fan2_seg4_speed" = "0x99" # 0xbd - Fan 2 segment 4 = 62%
register "hwm_fan2_seg5_speed" = "0x80" # 0xbe - Fan 2 segment 5 = 50%
register "hwm_fan2_temp_src" = "0x1e" # 0xbf - Fan 2 source = temperature 2
register "hwm_domain1_en" = "0x01"
register "hwm_fan1_boundary_hysteresis" = "0x43"
register "hwm_vt1_boundary_1_temperature" = "0x52" # 82°C
register "hwm_vt1_boundary_2_temperature" = "0x46" # 70°C
register "hwm_vt1_boundary_3_temperature" = "0x41" # 65°C
register "hwm_vt1_boundary_4_temperature" = "0x37" # 55°C
device pnp 4e.1 off end # Serial Port
device pnp 4e.4 on # Hardware monitor
io 0x60 = 0x295
irq 0x70 = 0
# global
irq 0x27 = 0x10 # PWOK follows Intel sequence
irq 0x2d = 0x2e # Anykey+MouseButton wakeup
end
device pnp 4e.5 on # Keyboard
io 0x60 = 0x060
irq 0x70 = 1
irq 0x72 = 12
end
device pnp 4e.6 on # GPIO
irq 0x70 = 0
irq 0xd0 = 0x20 # GPIO2 Output Enable
irq 0xd1 = 0x20 # GPIO2 Output Data
irq 0xd3 = 0x20 # GPIO2 Drive Enable
end
device pnp 4e.7 off # WDT
io 0x60 = 0xa00
end
device pnp 4e.8 off end # CIR
device pnp 4e.a on # PME, ACPI, Power Saving Registers
irq 0xe2 = 0x0c # EuP control
irq 0xed = 0xc0 # EuP Watchdog Control
irq 0xf4 = 0x10 # Keep Last State Select
irq 0xf9 = 0x09 # LED VSB Mode Select
end
end
end
device ref sata1 on end # SATA Controller 1
device ref smbus on end # SMBus
device ref sata2 off end # SATA Controller 2
device ref thermal off end # Thermal
end
end
end
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