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chip northbridge/amd/lx
device domain 0 on
device pci 1.0 on end # Northbridge
device pci 1.1 on end # Graphics
device pci 1.2 on end # AES
chip southbridge/amd/cs5536
# IRQ 12 and 1 unmasked, keyboard and mouse IRQs. OK
# SIRQ Mode = Active(Quiet) mode. Save power....
# Invert mask = IRQ 12 and 1 are active high. Keyboard and mouse,
# UARTs, etc IRQs. OK
register "lpc_serirq_enable" = "0x0000129A" # 00010010 10011010
register "lpc_serirq_polarity" = "0x0000ED65" # inverse of above
register "lpc_serirq_mode" = "1"
register "enable_gpio_int_route" = "0x0D0C0700"
register "enable_ide_nand_flash" = "0" # 0:ide mode, 1:flash
register "enable_USBP4_device" = "0" # 0:host, 1:device
register "enable_USBP4_overcurrent" = "0" # 0:off, xxxx:overcurrent setting CS5536 Data Book (pages 380-381)
register "com1_enable" = "1"
register "com1_address" = "0x3E8"
register "com1_irq" = "6"
register "com2_enable" = "0"
register "com2_address" = "0x2E8"
register "com2_irq" = "6"
register "unwanted_vpci[0]" = "0" # End of list has a zero
device pci 8.0 on end # Ethernet 2
device pci c.0 on end # IT8888
device pci d.0 on end # Mini-PCI
device pci e.0 on end # Ethernet 1
device pci f.0 on # ISA Bridge
chip superio/ite/it8712f
device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 2e.1 on # Com1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.2 on # Com2
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.3 on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 2e.4 on # EC
io 0x60 = 0x290 # EC
io 0x62 = 0x298 # PME
irq 0x70 = 9
end
device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
end
device pnp 2e.6 on # PS/2 mouse
irq 0x70 = 12
end
device pnp 2e.7 on # GPIO
io 0x62 = 0x1220 # Simple I/O
io 0x64 = 0x1228 # SPI
end
device pnp 2e.8 off # MIDI
io 0x60 = 0x300
irq 0x70 = 9
end
device pnp 2e.9 off # Game port
io 0x60 = 0x220
end
device pnp 2e.a off end # CIR
end
end
device pci f.2 on end # IDE
device pci f.3 on end # Audio
device pci f.4 on end # OHCI
device pci f.5 on end # EHCI
end
end
# APIC cluster is late CPU init.
device lapic_cluster 0 on
chip cpu/amd/geode_lx
device lapic 0 on end
end
end
end
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