blob: ebfe7a8bc61f1c203a1a426b10604d3136ac6b26 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
* Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
* Copyright (C) 2013 Vladimir Serbinenko <phcoder@gmail.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/device.h>
#include <ec/acpi/ec.h>
#include <northbridge/intel/ironlake/ironlake.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include "dock.h"
#include <drivers/intel/gma/int15.h>
#include <cpu/x86/lapic.h>
#include <drivers/lenovo/lenovo.h>
static void fill_ssdt(struct device *device)
{
drivers_lenovo_serial_ports_ssdt_generate("\\_SB.PCI0.LPCB", 0);
}
static void mainboard_enable(struct device *dev)
{
dev->ops->acpi_fill_ssdt_generator = fill_ssdt;
/* If we're resuming from suspend, blink suspend LED */
if (acpi_is_wakeup_s3())
ec_write(0x0c, 0xc7);
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
GMA_INT15_PANEL_FIT_DEFAULT,
GMA_INT15_BOOT_DISPLAY_LFP, 2);
init_dock();
}
struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};
|
