blob: b7effa2bcbf50aacd7300c5747eb310e032375a2 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
|
/*
* This file is part of the coreboot project.
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "ec.h"
#include <arch/acpi.h>
#include <console/console.h>
#include <device/device.h>
#include <southbridge/amd/agesa/hudson/smi.h>
static void pavilion_cold_boot_init(void)
{
/* Lid SMI is only used in non-ACPI mode; leave it off in S3 resume */
hudson_configure_gevent_smi(EC_LID_GEVENT, SMI_MODE_SMI, SMI_LVL_LOW);
/* EC is not powered off during S3 sleep */
lenovo_g505s_ec_init();
}
static void mainboard_enable(struct device *dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
hudson_configure_gevent_smi(EC_SMI_GEVENT, SMI_MODE_SMI, SMI_LVL_HIGH);
hudson_enable_smi_generation();
if (!acpi_is_wakeup_s3())
pavilion_cold_boot_init();
}
struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};
|