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##
## This file is part of the coreboot project.
##
## Copyright (C) 2007-2008 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
# -----------------------------------------------------------------
entries
# -----------------------------------------------------------------
# Status Register A
# -----------------------------------------------------------------
# Status Register B
# -----------------------------------------------------------------
# Status Register C
#96 4 r 0 status_c_rsvd
#100 1 r 0 uf_flag
#101 1 r 0 af_flag
#102 1 r 0 pf_flag
#103 1 r 0 irqf_flag
# -----------------------------------------------------------------
# Status Register D
#104 7 r 0 status_d_rsvd
#111 1 r 0 valid_cmos_ram
# -----------------------------------------------------------------
# Diagnostic Status Register
#112 8 r 0 diag_rsvd1
# -----------------------------------------------------------------
0 120 r 0 reserved_memory
#120 264 r 0 unused
# -----------------------------------------------------------------
# RTC_BOOT_BYTE (coreboot hardcoded)
384 1 e 4 boot_option
388 4 h 0 reboot_counter
#390 2 r 0 unused?
# -----------------------------------------------------------------
# coreboot config options: console
392 3 e 5 baud_rate
395 4 e 6 debug_level
#399 1 r 0 unused
# coreboot config options: cpu
400 1 e 2 hyper_threading
#401 7 r 0 unused
# coreboot config options: southbridge
408 1 e 1 nmi
409 2 e 7 power_on_after_fail
#411 5 r 0 unused
# coreboot config options: bootloader
416 512 s 0 boot_devices
928 8 h 0 boot_default
936 1 e 11 cmos_defaults_loaded
#937 11 r 0 unused
# coreboot config options: mainboard specific options
948 2 e 8 cpufan_cruise_control
950 2 e 8 sysfan_cruise_control
952 4 e 9 cpufan_speed
#956 4 e 10 cpufan_temperature
960 4 e 9 sysfan_speed
#964 4 e 10 sysfan_temperature
968 1 e 2 ethernet1
969 1 e 2 ethernet2
970 1 e 2 ethernet3
971 1 e 1 lpt
#972 12 r 0 unused
# coreboot config options: check sums
984 16 h 0 check_sum
#1000 24 r 0 amd_reserved
# RAM initialization internal data
1024 8 r 0 C0WL0REOST
1032 8 r 0 C1WL0REOST
1040 8 r 0 RCVENMT
1048 4 r 0 C0DRT1
1052 4 r 0 C1DRT1
# -----------------------------------------------------------------
enumerations
#ID value text
1 0 Disable
1 1 Enable
2 0 Enable
2 1 Disable
4 0 Fallback
4 1 Normal
5 0 115200
5 1 57600
5 2 38400
5 3 19200
5 4 9600
5 5 4800
5 6 2400
5 7 1200
6 1 Emergency
6 2 Alert
6 3 Critical
6 4 Error
6 5 Warning
6 6 Notice
6 7 Info
6 8 Debug
6 9 Spew
7 0 Disable
7 1 Enable
7 2 Keep
# Fan Cruise Control
8 0 Disabled
8 1 Speed
#8 2 Thermal
# Fan Speed (Rotations per Minute)
9 0 5625
9 1 5192
9 2 4753
9 3 4326
9 4 3924
9 5 3552
9 6 3214
9 7 2909
9 8 2636
9 9 2393
9 10 2177
9 11 1985
9 12 1814
9 13 1662
9 14 1527
9 15 1406
#
# Temperature (°C/°F)
#10 0 30/86
#10 1 33/91
#10 2 36/96
#10 3 39/102
#10 4 42/107
#10 5 45/113
#10 6 48/118
#10 7 51/123
#10 8 54/129
#10 9 57/134
#10 10 60/140
#10 11 63/145
#10 12 66/150
#10 13 69/156
#10 14 72/161
#10 15 75/167
11 0 No
11 1 Yes
# -----------------------------------------------------------------
checksums
checksum 392 983 984
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