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path: root/src/mainboard/intel/jarrell/devicetree.cb
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chip northbridge/intel/e7520
	device pci_domain 0 on
		device pci 00.0 on end
		device pci 00.1 on end
		device pci 01.0 on end
		device pci 02.0 on
			chip southbridge/intel/pxhd # pxhd1
				device pci 00.0 on end
				device pci 00.1 on end
				device pci 00.2 on
					chip drivers/generic/generic
						device pci 04.0 on end
						device pci 04.1 on end
					end
				end
				device pci 00.3 on end
			end
		end
		device pci 06.0 on end
		chip southbridge/intel/i82801ex # i82801er
			device pci 1d.0 on end
			device pci 1d.1 on end
			device pci 1d.2 on end
			device pci 1d.3 off end
			device pci 1d.7 on end
			device pci 1e.0 on
				chip drivers/ati/ragexl
					device pci 0c.0 on end
				end
			end
			device pci 1f.0 on
				chip superio/nsc/pc87427
					device pnp 2e.0 off end
					device pnp 2e.2 on
#						 io 0x60 = 0x2f8
#						irq 0x70 = 3
						 io 0x60 = 0x3f8
						irq 0x70 = 4
					end
					device pnp 2e.3 on
#						 io 0x60 = 0x3f8
#						irq 0x70 = 4
						 io 0x60 = 0x2f8
						irq 0x70 = 3
					end
					device pnp 2e.4 off end
					device pnp 2e.5 off end
					device pnp 2e.6 on
						 io 0x60 = 0x60
						 io 0x62 = 0x64
						irq 0x70 = 1
					end
					device pnp 2e.7 off end
					device pnp 2e.9 off end
					device pnp 2e.a off end
					device pnp 2e.f on end
					device pnp 2e.10 off end
					device pnp 2e.14 off end
				end
			end
			device pci 1f.1 on end
			device pci 1f.2 off end
			device pci 1f.3 on end
			device pci 1f.5 off end
			device pci 1f.6 off end
			register "gpio[40]" = "ICH5R_GPIO_USE_AS_GPIO"
			register "gpio[48]" = "ICH5R_GPIO_USE_AS_GPIO | ICH5R_GPIO_SEL_OUTPUT | ICH5R_GPIO_LVL_LOW"
			register "gpio[41]" = "ICH5R_GPIO_USE_AS_GPIO | ICH5R_GPIO_SEL_INPUT"
		end
	end
	device lapic_cluster 0 on
		chip cpu/intel/socket_mPGA604 # cpu 0
			device lapic 0 on end
		end
		chip cpu/intel/socket_mPGA604 # cpu 1
			device lapic 6 on end
		end
	end
end