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chip soc/intel/tigerlake
# BitMask where bits [3:0] are Controller 0 Channel [3:0] and
# bits [7:4] are Controller 1 Channel [3:0].
# Enable Command Mirroring for controller 0 channel 0 and 1,
# and controller 1 channel 0 and 1.
register "CmdMirror" = "0x00000033"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # Type-A / Type-C Port 0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)" # Type-A / Type-C Port 1
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC1)" # Type-A / Type-C Port 1
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Front Camera
register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC0)" # Type-A / Type-C Port 0
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-A / Type-C Port 0
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-A / Type-C Port 1
register "SaGv" = "SaGv_Disabled"
# Disable SRCCLKREQ1#
register "PcieClkSrcUsage[1]" = "PCIE_CLK_NOTUSED"
device domain 0 on
device ref dptf on
chip drivers/intel/dptf
## Disable Active Policy
register "policies.active" = "{[0] = {.target=DPTF_NONE}}"
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 85, 1000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 65, 6000),
[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 65, 6000),
[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 65, 6000),
[4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 65, 6000)}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN),
[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN),
[4] = DPTF_CRITICAL(TEMP_SENSOR_3, 75, SHUTDOWN)}"
## Power Limits Control
# 3-9W PL1 in 200mW increments, avg over 28-32s interval
# PL2 ranges from 9 to 40W, avg over 28-32s interval
register "controls.power_limits" = "{
.pl1 = {.min_power = 3000,
.max_power = 9000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 200,},
.pl2 = {.min_power = 40000,
.max_power = 40000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 1000,}}"
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 255, 1700 },
[1] = { 24, 1500 },
[2] = { 16, 1000 },
[3] = { 8, 500 }}"
device generic 0 on end
end
end
device ref i2c0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
register "name" = ""RT58""
register "desc" = ""Headset Codec""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_R5)"
# Set the jd_src to RT5668_JD1 for jack detection
register "property_count" = "1"
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""
register "property_list[0].integer" = "1"
device i2c 1a on
end
end
chip drivers/i2c/max98373
register "vmon_slot_no" = "0"
register "imon_slot_no" = "1"
register "uid" = "0"
register "desc" = ""Right Speaker Amp""
register "name" = ""MAXR""
device i2c 31 on
probe AUDIO MAX98373_ALC5682I_I2S_UP4
end
end
chip drivers/i2c/max98373
register "vmon_slot_no" = "2"
register "imon_slot_no" = "3"
register "uid" = "1"
register "desc" = ""Left Speaker Amp""
register "name" = ""MAXL""
device i2c 32 on
probe AUDIO MAX98373_ALC5682I_I2S_UP4
end
end
end
device ref i2c1 on
chip drivers/i2c/hid
register "generic.hid" = ""ELAN90FC""
register "generic.desc" = ""ELAN Touchscreen""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)"
register "generic.probed" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F16)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end
end
device ref i2c5 on
chip drivers/i2c/hid
register "generic.hid" = ""ELAN2700""
register "generic.desc" = ""ELAN Touchpad""
register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E15_IRQ)"
register "generic.wake" = "GPE0_DW2_15"
register "generic.probed" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 15 on end
end
end
device ref pch_espi on
chip ec/google/chromeec
use conn0 as mux_conn[0]
use conn1 as mux_conn[1]
device pnp 0c09.0 on end
end
end
device ref pmc hidden
# The pmc_mux chip driver is a placeholder for the
# PMC.MUX device in the ACPI hierarchy.
chip drivers/intel/pmc_mux
device generic 0 on
chip drivers/intel/pmc_mux/conn
register "usb2_port_number" = "5"
register "usb3_port_number" = "1"
# SBU is fixed, HSL follows CC
register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
register "usb2_port_number" = "3"
register "usb3_port_number" = "2"
# SBU is fixed, HSL follows CC
register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
device generic 1 alias conn1 on end
end
end
end
end
end
end
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