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##
## This file is part of the coreboot project.
##
## Copyright 2014 Rockchip Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
config BOARD_GOOGLE_VEYRON # dummy option to be selected by variant boards
def_bool n
if BOARD_GOOGLE_VEYRON
# Some Veyron boards incorrectly had their RAM code strapped with 100Kohm
# resistors. These get overpowered by the SoC's internal pull-downs, so we
# cannot read those pins as tri-state. They're restricted to binary RAM codes.
config VEYRON_FORCE_BINARY_RAM_CODE
bool
default y if BOARD_GOOGLE_VEYRON_JAQ
default y if BOARD_GOOGLE_VEYRON_JERRY
default y if BOARD_GOOGLE_VEYRON_MIGHTY
default n
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BOARD_ID_AUTO
select COMMON_CBFS_SPI_WRAPPER
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
select RAM_CODE_SUPPORT
select SOC_ROCKCHIP_RK3288
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_DO_NATIVE_VGA_INIT
select MAINBOARD_HAS_CHROMEOS
select BOARD_ROMSIZE_KB_4096
select HAVE_HARD_RESET
select SPI_FLASH
select SPI_FLASH_GIGADEVICE
select SPI_FLASH_WINBOND
config CHROMEOS
select EC_SOFTWARE_SYNC
select VBOOT_VBNV_EC
select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR
string
default google/veyron
config MAINBOARD_PART_NUMBER
string
default "Veyron"
config MAINBOARD_VENDOR
string
default "Google"
config EC_GOOGLE_CHROMEEC_SPI_BUS
hex
default 0x0
config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US
int
default 100
config BOOT_DEVICE_SPI_FLASH_BUS
int
default 2
config DRIVER_TPM_I2C_BUS
hex
default 0x1
config DRIVER_TPM_I2C_ADDR
hex
default 0x20
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on DRIVERS_UART
default 0xFF690000
config PMIC_BUS
int
default 0
config CBFS_SIZE
hex
default 0x100000 if CHROMEOS
default ROM_SIZE
config EC_GOOGLE_CHROMEEC_BOARDNAME
string
depends on CHROMEOS
#default "gus" if BOARD_GOOGLE_VEYRON_GUS
#default "jaq" if BOARD_GOOGLE_VEYRON_JAQ
default "jerry" if BOARD_GOOGLE_VEYRON_JERRY
#default "mighty" if BOARD_GOOGLE_VEYRON_MIGHTY
#default "minnie" if BOARD_GOOGLE_VEYRON_MINNIE
#default "nicky" if BOARD_GOOGLE_VEYRON_NICKY
#default "pinky" if BOARD_GOOGLE_VEYRON_PINKY
#default "minnie" if BOARD_GOOGLE_VEYRON_SHARK
#default "speedy" if BOARD_GOOGLE_VEYRON_SPEEDY
#default "thea" if BOARD_GOOGLE_VEYRON_THEA
config GBB_HWID
string
depends on CHROMEOS
default "GUS TEST A-A 2606" if BOARD_GOOGLE_VEYRON_GUS
default "JAQ TEST A-A 8292" if BOARD_GOOGLE_VEYRON_JAQ
default "JERRY TEST A-A 1250" if BOARD_GOOGLE_VEYRON_JERRY
default "MIGHTY TEST A-A 4557" if BOARD_GOOGLE_VEYRON_MIGHTY
default "MINNIE TEST A-A 5151" if BOARD_GOOGLE_VEYRON_MINNIE
default "NICKY TEST A-A 9039" if BOARD_GOOGLE_VEYRON_NICKY
default "PINKY TEST A-A 3693" if BOARD_GOOGLE_VEYRON_PINKY
default "SHARK TEST A-A 8553" if BOARD_GOOGLE_VEYRON_SHARK
default "SPEEDY TEST A-A 8421" if BOARD_GOOGLE_VEYRON_SPEEDY
default "THEA TEST A-A 7163" if BOARD_GOOGLE_VEYRON_THEA
config CHROMEOS_FWID_MODEL
string
default "Google_Veyron_Gus" if BOARD_GOOGLE_VEYRON_GUS
default "Google_Veyron_Jaq" if BOARD_GOOGLE_VEYRON_JAQ
default "Google_Veyron_Jerry" if BOARD_GOOGLE_VEYRON_JERRY
default "Google_Veyron_Mighty" if BOARD_GOOGLE_VEYRON_MIGHTY
default "Google_Veyron_Minnie" if BOARD_GOOGLE_VEYRON_MINNIE
default "Google_Veyron_Nicky" if BOARD_GOOGLE_VEYRON_NICKY
default "Google_Veyron_Pinky" if BOARD_GOOGLE_VEYRON_PINKY
default "Google_Veyron_Shinky" if BOARD_GOOGLE_VEYRON_SHARK
default "Google_Veyron_Speedy" if BOARD_GOOGLE_VEYRON_SPEEDY
default "Google_Veyron_Thea" if BOARD_GOOGLE_VEYRON_THEA
endif # BOARD_GOOGLE_VEYRON
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