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##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
if BOARD_GOOGLE_RUSH
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BOARD_ID_AUTO
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
select EC_SOFTWARE_SYNC
select MAINBOARD_DO_NATIVE_VGA_INIT
select SPI_FLASH
select SOC_NVIDIA_TEGRA132
select MAINBOARD_DO_SOR_INIT
select MAINBOARD_HAS_BOOTBLOCK_INIT
select MAINBOARD_HAS_CHROMEOS
select VIRTUAL_DEV_SWITCH
select BOARD_ROMSIZE_KB_4096
select ARCH_SPINTABLE
config MAINBOARD_DIR
string
default google/rush
config MAINBOARD_PART_NUMBER
string
default "Rush"
config DRAM_SIZE_MB
int
default 2048
choice
prompt "BCT boot media"
default RUSH_BCT_CFG_SPI
help
Which boot media to configure the BCT for.
config RUSH_BCT_CFG_SPI
bool "SPI"
help
Configure the BCT for booting from SPI.
config RUSH_BCT_CFG_EMMC
bool "eMMC"
help
Configure the BCT for booting from eMMC.
endchoice
config BOOT_MEDIA_SPI_BUS
int "SPI bus with boot media ROM"
range 1 6
depends on RUSH_BCT_CFG_SPI
default 4
help
Which SPI bus the boot media is connected to.
config BOOT_MEDIA_SPI_CHIP_SELECT
int "Chip select for SPI boot media"
range 0 3
depends on RUSH_BCT_CFG_SPI
default 0
help
Which chip select to use for boot media.
# For rush, we are using vboot2. Thus, index for stages:
# VBOOT_ROMSTAGE_INDEX -> Use default value of 0x2
# VBOOT_RAMSTAGE_INDEX -> Use 0x3
config VBOOT_RAMSTAGE_INDEX
hex
default 0x3
config DRIVER_TPM_I2C_BUS
hex
default 0x2
config DRIVER_TPM_I2C_ADDR
hex
default 0x20
config EC_GOOGLE_CHROMEEC_SPI_BUS
hex
default 1
endif # BOARD_GOOGLE_RUSH
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