blob: 1bfae4dfe7482e1c0773348abee08b4d53481a94 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2018 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/acpi.h>
#include <baseboard/variants.h>
#include <gpio.h>
#define TS_ENABLE GPP_B4
void variant_smi_sleep(u8 slp_typ)
{
if (slp_typ == ACPI_S5) {
/* Set TS to disable */
gpio_set(TS_ENABLE, 0);
}
}
|
