aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/google/fizz/mainboard.c
blob: 98c00782f7e86c07063478ad88d7dc54a8f40ce5 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
/*
 * This file is part of the coreboot project.
 *
 * Copyright (C) 2017 Google Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <arch/acpi.h>
#include <console/console.h>
#include <chip.h>
#include <device/device.h>
#include <ec/ec.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
#include <mainboard/google/fizz/gpio.h>
#include <smbios.h>
#include <soc/gpio.h>
#include <soc/pci_devs.h>
#include <soc/nhlt.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>

#define FIZZ_SKU_ID_I7_U42 0x4
#define FIZZ_PL2_I7_U42    44
#define FIZZ_PL2_OTHERS    29
/*
 * For type-C chargers, set PL2 to 90% of max power to account for
 * cable loss and FET Rdson loss in the path from the source.
 */
#define GET_TYPEC_PL2(w)   (9 * (w) / 10)

#define OEM_ID_COUNT	3
#define SKU_ID_COUNT	7

/* List of BJ adapters shipped with Fizz or its variants */
enum bj_adapter {
	BJ_UNKNOWN,
	BJ_65W_19V,
	BJ_90W_19V,
	BJ_65W_19P5V,
	BJ_90W_19P5V,
	BJ_COUNT,
};

/* BJ adapter specs */
static const struct {
	uint16_t current_lim; /* in mA */
	uint16_t voltage_lim; /* in mV */
} bj_adapters[] = {
	[BJ_65W_19V] = { .current_lim = 3420, .voltage_lim = 19000 },
	[BJ_90W_19V] = { .current_lim = 4740, .voltage_lim = 19000 },
	[BJ_65W_19P5V] = { .current_lim = 3330, .voltage_lim = 19500 },
	[BJ_90W_19P5V] = { .current_lim = 4620, .voltage_lim = 19500 },
};

/*
 * The table showing which device is shipped with which BJ adapter.
 *
 *        | SKU0     SKU1     ...
 *   OEM0 | AdapterX AdapterZ ...
 *   OEM1 | AdapterY ...
 *   ...  |
 */
static const enum bj_adapter bj_adapter_table[OEM_ID_COUNT][SKU_ID_COUNT] = {
	{ BJ_65W_19P5V, BJ_65W_19P5V, BJ_90W_19P5V, BJ_90W_19P5V,
			BJ_90W_19P5V, BJ_90W_19P5V, BJ_65W_19P5V },
	{ BJ_65W_19V, BJ_65W_19V, BJ_UNKNOWN, BJ_UNKNOWN,
			BJ_90W_19V, BJ_90W_19V, BJ_UNKNOWN },
	{ BJ_65W_19V, BJ_65W_19V, BJ_90W_19V, BJ_90W_19V,
			BJ_90W_19V, BJ_90W_19V, BJ_65W_19V },
};

static const char *oem_id = "GOOGLE";
static const char *oem_table_id = "FIZZ";

static uint8_t board_sku_id(void)
{
	static int id = -1;
	const gpio_t sku_id_gpios[] = {
		GPIO_SKU_ID0,
		GPIO_SKU_ID1,
		GPIO_SKU_ID2,
		GPIO_SKU_ID3,
	};
	if (id < 0)
		id = gpio_base2_value(sku_id_gpios, ARRAY_SIZE(sku_id_gpios));
	return id;
}

/*
 * mainboard_get_pl2
 *
 * @return value Pl2 should be set to
 *
 * Check if charger is USB C.  If so, set to 90% of the max value.
 * Otherwise, set PL2 based on sku id.
 */
static u32 mainboard_get_pl2(void)
{
	enum usb_chg_type type;
	u32 watts;

	int rv = google_chromeec_get_usb_pd_power_info(&type, &watts);

	/* If we can't get charger info or not PD charger, assume barrel jack */
	if (rv != 0 || type != USB_CHG_TYPE_PD) {
		/* using the barrel jack, get PL2 based on sku id */
		watts = FIZZ_PL2_OTHERS;
		if (board_sku_id() == FIZZ_SKU_ID_I7_U42)
			watts = FIZZ_PL2_I7_U42;
	} else
		watts = GET_TYPEC_PL2(watts);

	return watts;
}

static uint8_t board_oem_id(void)
{
	static int id = -1;
	const gpio_t oem_id_gpios[] = {
		GPIO_OEM_ID1,
		GPIO_OEM_ID2,
		GPIO_OEM_ID3,
	};
	if (id < 0)
		id = gpio_base2_value(oem_id_gpios, ARRAY_SIZE(oem_id_gpios));
	return id;
}

const char *smbios_mainboard_sku(void)
{
	static char sku_str[5]; /* sku{0..7} */

	snprintf(sku_str, sizeof(sku_str), "sku%d", board_oem_id());

	return sku_str;
}

static void mainboard_init(device_t dev)
{
	mainboard_ec_init();
}

static unsigned long mainboard_write_acpi_tables(
	device_t device, unsigned long current, acpi_rsdp_t *rsdp)
{
	uintptr_t start_addr;
	uintptr_t end_addr;
	struct nhlt *nhlt;

	start_addr = current;

	nhlt = nhlt_init();
	if (!nhlt)
		return start_addr;

	/* RT5663 Headset codec */
	if (nhlt_soc_add_rt5663(nhlt, AUDIO_LINK_SSP1))
		printk(BIOS_ERR, "Couldn't add headset codec.\n");

	end_addr = nhlt_soc_serialize_oem_overrides(nhlt, start_addr,
				oem_id, oem_table_id, 0);

	if (end_addr != start_addr)
		acpi_add_table(rsdp, (void *)start_addr);

	return end_addr;
}

/*
 * Set max current and voltage for a barrel jack adapter based on {OEM, SKU}.
 * If this fails, the limit will remain unchanged = default values, which make
 * the system run under safe but under-rated power.
 * If a BJ adapter isn't plugged, this is a no-op.
 */
static void set_bj_adapter_limit(void)
{
	uint8_t oem = board_oem_id();
	uint8_t sku = board_sku_id();
	enum bj_adapter bj;

	if (oem >= OEM_ID_COUNT || sku >= SKU_ID_COUNT) {
		printk(BIOS_ERR, "Unrecognized OEM or SKU: %d/%d\n", oem, sku);
		return;
	}

	bj = bj_adapter_table[oem][sku];
	if (bj <= BJ_UNKNOWN || BJ_COUNT <= bj) {
		printk(BIOS_ERR, "Invalid BJ adapter ID: %d\n", bj);
		return;
	}
	printk(BIOS_INFO, "Setting BJ limit: %dmA/%dmV\n",
	       bj_adapters[bj].current_lim, bj_adapters[bj].voltage_lim);
	if (google_chromeec_override_dedicated_charger_limit(
			bj_adapters[bj].current_lim,
			bj_adapters[bj].voltage_lim))
		printk(BIOS_ERR, "Failed to set BJ limit\n");
}

static void mainboard_enable(device_t dev)
{
	device_t root = SA_DEV_ROOT;
	config_t *conf = root->chip_info;

	conf->tdp_pl2_override = mainboard_get_pl2();

	set_bj_adapter_limit();

	dev->ops->init = mainboard_init;
	dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
	dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
}

struct chip_operations mainboard_ops = {
	.enable_dev = mainboard_enable,
};