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config BOARD_GOOGLE_BASEBOARD_DRALLION
def_bool n
select BOARD_ROMSIZE_KB_32768
select DRIVERS_GFX_GENERIC
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select DRIVERS_INTEL_ISH
select DRIVERS_SPI_ACPI
select DRIVERS_USB_ACPI
select EC_GOOGLE_WILCO
select GOOGLE_SMBIOS_MAINBOARD_VERSION
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select INTEL_LPSS_UART_FOR_CONSOLE
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_I2C_TPM_CR50
select MAINBOARD_HAS_TPM2
select SMBIOS_SERIAL_FROM_VPD if VPD
select SOC_INTEL_COMETLAKE_1
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE
select SYSTEM_TYPE_LAPTOP
select TPM2
select MAINBOARD_USES_IFD_EC_REGION
select HAVE_SPD_IN_CBFS
if BOARD_GOOGLE_BASEBOARD_DRALLION
config CHROMEOS
select GBB_FLAG_FORCE_DEV_SWITCH_ON
select GBB_FLAG_FORCE_DEV_BOOT_USB
select GBB_FLAG_FORCE_DEV_BOOT_LEGACY
select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
config CHROMEOS_WIFI_SAR
bool "Enable SAR options for Chrome OS build"
depends on CHROMEOS
select DSAR_ENABLE
select GEO_SAR_ENABLE
select SAR_ENABLE
select USE_SAR
select WIFI_SAR_CBFS
config DIMM_MAX
int
default 2
config DIMM_SPD_SIZE
int
default 512
config DRIVER_TPM_I2C_BUS
hex
default 0x4
config DRIVER_TPM_I2C_ADDR
hex
default 0x50
config TPM_TIS_ACPI_INTERRUPT
int
default 82 # GPE0_DW2_18 (GPP_D18)
config POWER_OFF_ON_CR50_UPDATE
bool
default n
config MAINBOARD_DIR
string
default "google/drallion"
config MAINBOARD_FAMILY
string
default "Google_Drallion" if BOARD_GOOGLE_DRALLION
config MAINBOARD_PART_NUMBER
string
default "Drallion" if BOARD_GOOGLE_DRALLION
config UART_FOR_CONSOLE
int
default 0 if BOARD_GOOGLE_DRALLION
config VARIANT_DIR
string
default "drallion" if BOARD_GOOGLE_DRALLION
config DEVICETREE
string
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config VBOOT
select HAS_RECOVERY_MRC_CACHE
select VBOOT_LID_SWITCH
endif # BOARD_GOOGLE_BASEBOARD_DRALLION
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