blob: 6c95a1d0f0143a0c5a80e59d09442450b5699f47 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
|
/*
* This file is part of the coreboot project.
*
* Copyright 2020 The coreboot project Authors.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
static const struct pad_config gpio_table[] = {
/* ToDo: Fill gpio configuration */
};
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
/* ToDo: Fill early gpio configuration */
};
const struct pad_config *__weak variant_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(gpio_table);
return gpio_table;
}
const struct pad_config *__weak variant_early_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}
/* GPIO settings before entering sleep. */
static const struct pad_config sleep_gpio_table[] = {
};
const struct pad_config *__weak variant_sleep_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(sleep_gpio_table);
return sleep_gpio_table;
}
static const struct cros_gpio cros_gpios[] = {
};
const struct cros_gpio *__weak variant_cros_gpios(size_t *num)
{
*num = ARRAY_SIZE(cros_gpios);
return cros_gpios;
}
|
