blob: e143f700cd17710580c01acf1ee51441e2a73fef (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
|
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/variants.h>
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
#include <memory_info.h>
#include <soc/meminit.h>
#include <soc/romstage.h>
#include <string.h>
#include <variant/gpio.h>
void mainboard_memory_init_params(FSPM_UPD *memupd)
{
const struct mb_cfg *board_cfg = variant_memcfg_config();
const struct spd_info spd_info = {
.read_type = READ_SPD_CBFS,
.spd_spec.spd_index = variant_memory_sku(),
};
bool half_populated = variant_mem_is_half_populated();
memcfg_init(&memupd->FspmConfig, board_cfg, &spd_info, half_populated);
}
const char *mainboard_get_dram_part_num(void)
{
static char part_num_store[DIMM_INFO_PART_NUMBER_SIZE];
if (google_chromeec_cbi_get_dram_part_num(&part_num_store[0],
sizeof(part_num_store)) < 0) {
printk(BIOS_ERR, "No DRAM part number in CBI!\n");
return NULL;
}
return part_num_store;
}
|
