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##
## This file is part of the coreboot project.
##
##
## SPDX-License-Identifier: GPL-2.0-only

chip soc/samsung/exynos5250
	device cpu_cluster 0 on end
	register "xres" = "1366"
	register "yres" = "768"
	register "framebuffer_bits_per_pixel" = "16"
	# complex magic timing!
	register "clkval_f" = "2"
	register "upper_margin" = "14"
	register "lower_margin" = "3"
	register "vsync" = "5"
	register "left_margin" = "80"
	register "right_margin" = "48"
	register "hsync" = "32"
end